MC68MH360RC25L Freescale Semiconductor, MC68MH360RC25L Datasheet - Page 18
MC68MH360RC25L
Manufacturer Part Number
MC68MH360RC25L
Description
IC MPU QUICC 25MHZ 241-PGA
Manufacturer
Freescale Semiconductor
Specifications of MC68MH360RC25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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works transparently, not participating in any QMC protocol functions. The SCC only
performs the parallel-to-serial conversion and adds elasticity through its FIFO memory. The
CPM, with its special enhanced microcode and additional dedicated hardware for framing
and masking support, does all of the protocol processing for each of the 64 channels. Note
that it is executed without intervention from the on-board CPU. Figure 1-1 illustrates the
QMC’s multichannel capability. Note that each SCC can support up to 64 channels from
the TDM; however, there are limitations depending on the device used. This is summarized
in Section 1.3, “QMC Features.”
Each SCC can work in QMC mode, either alone or together in any combination. The larger
FIFO of SCC1 yields the best performance and is therefore recommended for QMC
operation. One TDM connection can be routed to one or more SCCs operating in QMC
mode, with each SCC operating on different time slots. It is possible to use both TDMs for
QMC with combined routing to one SCC or to separate SCCs. When using two TDMs
connected to one SCC, restrictions such as using common clocks and sync inputs apply; it
is also important to avoid collisions by separating the serial interface (SI) routing.
SCC1
64
Freescale Semiconductor, Inc.
1
Figure 1-1. QMC Channel Addressing Capability
For More Information On This Product,
SCC2
64
1
Go to: www.freescale.com
SCC3
QMC Supplement
64
1
Serial Interface
CPM
SCC4
64
1
SMC1
SMC2
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