EZ80190AZ050SG Zilog, EZ80190AZ050SG Datasheet - Page 72

• Manufacturer Part Number: EZ80190AZ050SG
• Description: IC WEBSERVER 8 BIT 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050SG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80190x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3866; EZ80190AZ050SG

Universal Zilog Interface
PS006614-1208
The eZ80190 device features two on-chip Universal Zilog Interface (UZI) devices. Each
UZI contains three serial communication controller blocks: a Serial Peripheral Interface
(SPI), a Universal Asynchronous Receiver/Transmitter (UART), and an Inter-Integrated
Circuit serial bus (I
trollers can be enabled. The UZI devices are connected to GPIO pins on Port C (UZI 1)
and Port D (UZI 0). Ports C and D must be configured for alternate-function I/O to allow
the UZI devices to communicate via the Port C and D pins. Each UZI also contains control
registers and a Baud Rate Generator (BRG) that generates a lower-frequency clock for the
SPI and UART devices. The I
block, including the Baud Rate Generator, is inactive when none of the serial devices are
selected.
See
on page 67, and
Serial Peripheral Interface
Figure 11
I2C Serial I/O Interface
2
displays the UZI block diagram.
C). For each UZI device, any one of these three communication con-
I
2
Interrupt
C
UZI
GPIO Port C (UZI1) or Port D (UZIO)
2
C block features its own clock generator. The entire UZI
on page 84,
To eZ80
UZI Interface
Figure 11. UZI Block Diagram
SPI
on page 92 chapters for detailed operating infor-
®
CPU
Universal Asynchronous Receiver/Transmitter
Data
Address
I/O
UART
Baud Rate
Generator
Clock
Product Specification
Universal Zilog Interface
Universal
Interface
Zilog
Alternate
Function
Enable
GPIO
eZ80190
62