EZ80190AZ050SG Zilog, EZ80190AZ050SG Datasheet - Page 118

IC WEBSERVER 8 BIT 50MHZ 100LQFP

EZ80190AZ050SG

Manufacturer Part Number
EZ80190AZ050SG
Description
IC WEBSERVER 8 BIT 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80190AZ050SG

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80190x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3866
EZ80190AZ050SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80190AZ050SG
Manufacturer:
ZiLOG
Quantity:
135
Part Number:
EZ80190AZ050SG
Manufacturer:
Zilog
Quantity:
10 000
PS006614-1208
Table 52. I
I
Table 53. I
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
7
IEN
6
ENAB
5
STA
4
STP
3
IFLG
2
ACK
[1:0]
Bit
Note: R = Read Only.
2
C Status Register
The I2Cx_SR register, listed in
tus code in the five msbs. The three lsbs are always 0. The Read Only I2Cx_SR registers
share the same I/O addresses as the Write Only I2Cx_CCR registers.
2
2
C Control Registers
C Status Registers
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
00
R/W
I
I
The I
ignored.
The I
A MASTER Mode START condition is sent.
A MASTER Mode START TRANSMIT condition occurs on the
bus.
A MASTER Mode STOP condition is sent.
A MASTER Mode STOP TRANSMIT condition occurs on the
bus.
The I
The I
Not Acknowledge.
Acknowledge.
Reserved.
7
0
7
2
2
C interrupt is disabled.
C interrupt is enabled.
2
2
2
2
C bus (SCLx/SDAx) is disabled and all inputs are
C bus (SCLx/SDAx) is enabled.
C interrupt flag is not set.
C interrupt flag is set.
R/W
6
0
6
Table
R/W
5
0
5
53, is a Read Only register that contains a 5-bit sta-
(I2C0_CTL = CBh, I2C1_CTL = DBh)
(I2C0_SR = CCh, I2C1_SR = DCh)
R/W
4
0
4
R/W
3
0
3
R/W
2
0
2
Product Specification
R/W
1
0
1
I2C Serial I/O Interface
R/W
0
0
0
108

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