EZ80190AZ050SG Zilog, EZ80190AZ050SG Datasheet - Page 157
EZ80190AZ050SG
Manufacturer Part Number
EZ80190AZ050SG
Description
IC WEBSERVER 8 BIT 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050SG
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80190x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3866
EZ80190AZ050SG
EZ80190AZ050SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EZ80190AZ050SG
Manufacturer:
ZiLOG
Quantity:
135
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Zilog Debug Interface
ZDI Overview
PS006614-1208
The Zilog Debug Interface (ZDI) provides a built-in debugging interface to the eZ80
CPU. ZDI provides basic in-circuit emulation features such as:
•
•
•
•
•
•
•
•
•
The above features are built into the silicon. Control is provided via a two-wire interface
that is connected to the ZPAK II emulator.
get board, ZPAK II, and the host PC running Zilog Developer Studio. For more informa-
tion on ZPAK II and ZDS II, refer to www.zilog.com.
Developer
The ZDI block for the eZ80190 device provides increased functionality from previous ver-
sions. ZDI allows reading and writing of most of the internal registers without disturbing
the state of the machine. New features allow READs and writes to memory to occur as fast
Studio II
Zilog
Examining and modifying internal registers
Examining and modifying memory
Starting and stopping the user program
Setting program and data break points
Single-stepping the user program
Executing user-supplied instructions
Debugging the final product with the inclusion of one small connector
Downloading code into SRAM
C source-level debugging using Zilog Developer Studio II (ZDS II)
Emulator
ZPAK II
Figure 26. Typical ZDI Debug Setup
Figure 26
C
o
n
n
e
c
o
r
t
displays a typical setup using a a tar-
User’s Target Boa
Product Specification
eZ80
190
®
Zilog Debug Interface
eZ80190
®
147
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