LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 86
![MCU 32BIT ARM CORTEX M3 256BGA](/photos/27/78/277808/lbga156_sml.jpg)
LPC1850FET256,551
Manufacturer Part Number
LPC1850FET256,551
Description
MCU 32BIT ARM CORTEX M3 256BGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheet
1.LPC1830FET256551.pdf
(87 pages)
Specifications of LPC1850FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
200K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Processor Series
LPC1850
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
200 KB
Interface Type
SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
80
Number Of Timers
6
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6682
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1850FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1850FET256,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
19. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.4.1
7.4.2
7.5
7.6
7.7
7.8
7.9
7.10
7.10.1
7.10.1.1
7.10.2
7.11
7.11.1
7.12
7.12.1
7.12.1.1
7.12.2
7.12.2.1
7.12.3
7.12.3.1
7.12.4
7.12.5
7.12.5.1
7.12.6
7.12.6.1
7.12.7
7.12.7.1
7.12.8
7.12.8.1
7.12.9
7.12.9.1
LPC1850_30_20_10
Objective data sheet
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pinning information . . . . . . . . . . . . . . . . . . . . . . 6
Functional description . . . . . . . . . . . . . . . . . . 30
Nested Vectored Interrupt Controller (NVIC) . 31
AES security engine . . . . . . . . . . . . . . . . . . . . 37
External Memory Controller (EMC). . . . . . . . . 40
High-speed USB Host/Device interface
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Architectural overview . . . . . . . . . . . . . . . . . . 30
ARM Cortex-M3 processor . . . . . . . . . . . . . . . 30
AHB multilayer matrix . . . . . . . . . . . . . . . . . . . 31
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 32
Event router . . . . . . . . . . . . . . . . . . . . . . . . . . 32
System Tick timer (SysTick) . . . . . . . . . . . . . . 32
On-chip static RAM. . . . . . . . . . . . . . . . . . . . . 32
Boot ROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Memory mapping . . . . . . . . . . . . . . . . . . . . . . 35
Security features. . . . . . . . . . . . . . . . . . . . . . . 37
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
One-Time Programmable (OTP) memory . . . 37
General Purpose I/O (GPIO) . . . . . . . . . . . . . 37
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
AHB peripherals . . . . . . . . . . . . . . . . . . . . . . . 38
State Configurable Timer (SCT) subsystem . . 38
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
General Purpose DMA (GPDMA) . . . . . . . . . . 38
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
SPI Flash Interface (SPIFI). . . . . . . . . . . . . . . 39
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SD/MMC card interface . . . . . . . . . . . . . . . . . 40
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
High-speed USB Host/Device/OTG interface
(USB0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
with ULPI (USB1) . . . . . . . . . . . . . . . . . . . . . . 41
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
LCD controller. . . . . . . . . . . . . . . . . . . . . . . . . 42
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
All information provided in this document is subject to legal disclaimers.
Rev. 1.2 — 17 February 2011
7.13
7.13.1
7.13.1.1
7.13.2
7.13.2.1
7.13.3
7.13.3.1
7.13.4
7.13.4.1
7.13.5
7.13.5.1
7.13.6
7.13.6.1
7.14
7.14.1
7.14.1.1
7.14.2
7.14.3
7.14.3.1
7.14.4
7.14.4.1
7.14.5
7.14.5.1
7.15
7.15.1
7.15.1.1
7.15.2
7.15.2.1
7.16
7.16.1
7.16.1.1
7.16.2
7.17
7.17.1
7.17.2
7.17.3
7.17.4
7.17.5
7.17.6
7.17.7
7.17.8
7.18
8
9
10
10.1
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 52
Thermal characteristics . . . . . . . . . . . . . . . . . 53
Static characteristics . . . . . . . . . . . . . . . . . . . 54
Digital serial peripherals. . . . . . . . . . . . . . . . . 43
UART1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
USART0/2/3 . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
SSP0/1 serial I/O controllers . . . . . . . . . . . . . 44
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
I
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
I
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
C_CAN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Counter/timers and motor control . . . . . . . . . 46
General purpose 32-bit timers/external event
counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Motor control PWM . . . . . . . . . . . . . . . . . . . . 47
Quadrature Encoder Interface (QEI) . . . . . . . 47
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Repetitive Interrupt (RI) timer. . . . . . . . . . . . . 47
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Windowed WatchDog Timer (WWDT) . . . . . . 48
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Analog peripherals . . . . . . . . . . . . . . . . . . . . . 48
Analog-to-Digital Converter (ADC0/1) . . . . . . 48
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Digital-to-Analog Converter (DAC). . . . . . . . . 48
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Peripherals in the RTC power domain . . . . . . 49
RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Alarm timer. . . . . . . . . . . . . . . . . . . . . . . . . . . 49
System control . . . . . . . . . . . . . . . . . . . . . . . . 49
Configuration registers (CREG) . . . . . . . . . . . 49
System Control Unit (SCU) . . . . . . . . . . . . . . 50
Clock Generation Unit (CGU) . . . . . . . . . . . . 50
Internal RC oscillator (IRC) . . . . . . . . . . . . . . 50
PLL0 (for USB0). . . . . . . . . . . . . . . . . . . . . . . 50
System PLL1 . . . . . . . . . . . . . . . . . . . . . . . . . 50
Reset Generation Unit (RGU) . . . . . . . . . . . . 50
Power control . . . . . . . . . . . . . . . . . . . . . . . . . 51
Emulation and debugging . . . . . . . . . . . . . . . 51
Electrical pin characteristics. . . . . . . . . . . . . . 57
2
2
C0/1-bus interfaces . . . . . . . . . . . . . . . . . . . 44
S interface . . . . . . . . . . . . . . . . . . . . . . . . . . 45
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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