LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 21

• Manufacturer Part Number: LPC1850FET256,551
• Description: MCU 32BIT ARM CORTEX M3 256BGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1850FET256,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 200K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Processor Series: LPC1850
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 200 KB
• Interface Type: SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 6
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6682

NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
PC_11
PC_12
PC_13
PC_14
PD_0
PD_1
PD_2
PD_3
PD_4
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
L5
L6
M1
N1
N2
P1
R1
P4
T2
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
I/O
I
I
-
I/O
-
O
-
I/O
-
O
-
I/O
-
I
-
-
O
O
-
-
-
O
-
-
O
I/O
-
-
O
I/O
-
-
O
I/O
-
All information provided in this document is subject to legal disclaimers.
SDIO_D4 — SD/MMC data bus line 4.
USB1_ULPI_DIR — ULPI link DIR signal. Controls the ULP data line
direction.
U1_DCD — Data Carrier Detect input for UART 1.
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SDIO_D5 — SD/MMC data bus line 5.
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U1_DTR — Data Terminal Ready output for UART 1. Can also be configured
to be an RS-485/EIA-485 output enable signal for UART 1.
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SDIO_D6 — SD/MMC data bus line 6.
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U1_TXD — Transmitter output for UART 1.
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SDIO_D7 — SD/MMC data bus line 7.
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U1_RXD — Receiver input for UART 1.
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CTOUT_15 — SCT output 15. Match output 3 of timer 3.
EXTBUS_DQMOUT2 — Data mask 2 used with SDRAM and static devices.
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EXTBUS_CKEOUT2 — SDRAM clock enable 2.
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CTOUT_7 — SCT output 7. Match output 3 of timer 1.
EXTBUS_D16 — External memory data line 16.
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CTOUT_6 — SCT output 7. Match output 2 of timer 1.
EXTBUS_D17 — External memory data line 17.
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CTOUT_8 — SCT output 8. Match output 0 of timer 2.
EXTBUS_D18 — External memory data line 18.
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Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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