LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 15

• Manufacturer Part Number: LPC1850FET256,551
• Description: MCU 32BIT ARM CORTEX M3 256BGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1850FET256,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 200K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Processor Series: LPC1850
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 200 KB
• Interface Type: SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 6
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6682

NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
P6_6
P6_7
P6_8
P6_9
P6_10
P6_11
P6_12
P7_0
P7_1
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
L14
J13
H13
J15
H15
H12
G15 I; PU
B16
C14
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
I/O
O
-
O
-
I/O
-
O
-
I/O
-
O
I/O
-
-
O
I/O
O
-
O
I/O
-
-
O
I/O
O
-
O
I/O
O
-
O
I/O
O
I/O
O
All information provided in this document is subject to legal disclaimers.
GPIO0[5] — General purpose digital input/output pin.
EXTBUS_BLS1 — LOW active Byte Lane select signal 1.
n.c.
USB0_PWR_FAULT — Port power fault signal indicating overcurrent
condition; this signal monitors over-current on the USB bus (external circuitry
required to detect over-current condition).
n.c.
EXTBUS_A15 — External memory address line 15.
n.c.
USB0_IND1 — USB0 port indicator LED control output 1.
n.c.
EXTBUS_A14 — External memory address line 14.
n.c.
USB0_IND0 — USB0 port indicator LED control output 0.
GPIO3[5] — General purpose digital input/output pin.
n.c.
n.c.
EXTBUS_DYCS0 — SDRAM chip select 0.
GPIO3[6] — General purpose digital input/output pin.
MCABORT — Motor control PWM, LOW-active fast abort.
n.c.
EXTBUS_DQMOUT1 — Data mask 1 used with SDRAM and static devices.
GPIO3[7] — General purpose digital input/output pin.
n.c.
n.c.
EXTBUS_CKEOUT0 — SDRAM clock enable 0.
GPIO2[8] — General purpose digital input/output pin.
CTOUT_7 — SCT output 7. Match output 3 of timer 1.
n.c.
EXTBUS_DQMOUT0 — Data mask 0 used with SDRAM and static devices.
GPIO3[8] — General purpose digital input/output pin.
CTOUT_14 — SCT output 14. Match output 2 of timer 3.
n.c.
LCDLE — Line end signal.
GPIO3[9] — General purpose digital input/output pin.
CTOUT_15 — SCT output 15. Match output 3 of timer 3.
I2S_TX_WS — Transmit Word Select. It is driven by the master and received
by the slave. Corresponds to the signal WS in the I
LCDVD19 — LCD data.
Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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