PSB21373HV1.1XT Infineon Technologies, PSB21373HV1.1XT Datasheet - Page 93

• Manufacturer Part Number: PSB21373HV1.1XT
• Manufacturer: Infineon Technologies

Specifications of PSB21373HV1.1XT

• Lead Free Status / RoHS Status: Compliant

Data Sheet
3.2.2
The management of the received HDLC frames as affected by the different operating
modes (see chapter 3.1) is shown in figure 49.
Figure 49
Receive Data Flow
MDS2
Description of Symbols:
0
0
1
1
1
Receive Frame Structure
MDS1
1
1
1
1
0
Compared with Registers
Stored in FIFO/Registers
MDS0
1
0
0
1
1
MODE
Non
Auto/16
Non
Auto/8
Transparent 0
Transparent 1
Transparent 2
FLAG
SAPG
SAP1
SAP2
TEI1
TEI2
SAP1
SAP2
SAPG
*
*
*
2)
2)
2)
ADDRESS
*
*
*
1)
2)
3)
ADDR
93
CRC optionally stored in RFIFO if EXMR.RCRC = 1
Address optionally stored in RFIFO if EXMR.SRA = 1
Start of the Control Field in Case of a 8 Bit Address
TEIG
TEI1
TEI2
TEI1
TEI2
TEIG
*
*
*
2)
3)
2)
CONTROL DATA
CTRL
RFIFO
RFIFO
RFIFO
RFIFO
RFIFO
I
*
*
*
*
*
1)
1)
1)
1)
1)
STATUS
RSTA
RSTA
RSTA
RSTA
RSTA
CRC
PSB 21373
fifoflow_rec
FLAG
2002-05-13