NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 57

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

3.5.14.
3.5.15.
Datasheet
R
MMADR    Memory Mapped Range Address Register (Device 1)
SVID    Subsystem Vendor Identification Register (Device 1)
Address Offset:
Default Value:
Access:
This register requests allocation for the internal graphics device of the GMCH registers and instruction
ports. The allocation is for 512 KB and the base address is defined by bits [31:19].
Address Offset:
Default Value:
Access:
31:19
31
15
18:4
15:0
2:1
Bit
Bit
3
0
Memory Base Address    R/W. Set by the OS, these bits correspond to address signals [31:19].
Address Mask    RO. Hardwired to 0s to indicate 512 KB address range.
Prefetchable Memory    RO. Hardwired to 0 to prevent prefetching.
Memory Type    RO. Hardwired to 0s to indicate 32-bit address.
Memory / IO Space    RO. Hardwired to 0 to indicate memory space.
Subsystem Vendor ID—R/WO. This value is used to identify the vendor of the subsystem. The
default value is 0000h. This field should be programmed by BIOS during boot-up. Once written, this
register becomes Read_Only. This Register can only be cleared by a Reset.
(HW=0; 512KB addr range)
Address Mask (cont)
Memory Base Address
(addr bits [31:19])
14−17h
00000000h
Read/Write, Read Only
2C−2Dh
0000h
Read/Write Once
4
Descriptions
Descriptions
Prefetch
Mem En
(HW=0)
3
2
(HW=0; 32MB addr)
Memory Type
19
18
Address Mask (HW=0;
Intel
512KB addr range)
®
82810E (GMCH)
1
Mem/IO
(HW=0)
Space
0
16
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