NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 4
NH82810 S L7XK
Manufacturer Part Number
NH82810 S L7XK
Description
Manufacturer
Intel
Datasheet
1.NH82810_S_L7XK.pdf
(119 pages)
Specifications of NH82810 S L7XK
Lead Free Status / RoHS Status
Compliant
Intel
4.
4
®
82810E (GMCH)
3.5.
3.6.
3.7.
Functional Description................................................................................................................ 69
4.1.
3.4.12.
3.4.13.
3.4.14.
3.4.15.
3.4.16.
3.4.17.
3.4.18.
3.4.19.
3.4.20.
3.4.21.
Graphics Device Registers (Device 1)........................................................................... 49
3.5.1.
3.5.2.
3.5.3.
3.5.4.
3.5.5.
3.5.6.
3.5.7.
3.5.8.
3.5.9.
3.5.10.
3.5.11.
3.5.12.
3.5.13.
3.5.14.
3.5.15.
3.5.16.
3.5.17.
3.5.18.
3.5.19.
3.5.20.
3.5.21.
3.5.22.
3.5.23.
3.5.24.
3.5.25.
Display Cache Interface................................................................................................. 62
3.6.1.
3.6.2.
3.6.3.
Display Cache Detect and Diagnostic Registers ........................................................... 65
3.7.1.
3.7.2.
3.7.3.
3.7.4.
3.7.5.
System Address Map .................................................................................................... 69
4.1.1.
4.1.1.1.
4.1.1.2.
CAPPTR Capabilities Pointer (Device 0) .................................................. 36
PAMR—Programmable Attributes Register (Device 0)............................... 38
DRPDRAM Row Population Register (Device 0)..................................... 39
DRAMTDRAM Timing Register (Device 0).............................................. 41
FCHCFixed DRAM Hole Control Register (Device 0).............................. 42
SMRAMSystem Management RAM Control Register (Device 0) ........... 43
MISCCMiscellaneous Control Register (Device 0) .................................. 45
MISCC2Miscellaneous Control 2 Register (Device 0) ............................. 46
BUFF_SC—System Memory Buffer Strength Control Register (Device 0). 47
VIDVendor Identification Register (Device 1) .......................................... 50
DIDDevice Identification Register (Device 1)........................................... 50
PCICMDPCI Command Register (Device 1) ........................................... 51
PCISTSPCI Status Register (Device 1) ................................................... 52
RIDRevision Identification Register (Device 1) ........................................ 53
PI-Programming Interface Register (Device 1) ........................................... 53
SUBC1—Sub-Class Code Register (Device 1) ........................................... 53
BCC1—Base Class Code Register (Device 1)............................................ 54
CLSCache Line Size Register (Device 1) ................................................ 54
MLTMaster Latency Timer Register (Device 1) ....................................... 54
HDRHeader Type Register (Device 1)..................................................... 55
BISTBuilt In Self Test (BIST) Register (Device 1) ................................... 55
GMADRGraphics Memory Range Address Register (Device 1) ............. 56
MMADRMemory Mapped Range Address Register (Device 1)............... 57
SVIDSubsystem Vendor Identification Register (Device 1) ..................... 57
SIDSubsystem Identification Register (Device 1) .................................... 58
ROMADRVideo BIOS ROM Base Address Registers (Device 1)........... 58
CAPPOINTCapabilities Pointer Register (Device 1)................................ 58
INTRLINEInterrupt Line Register (Device 1) ........................................... 59
INTRPINInterrupt Pin Register (Device 1) ............................................... 59
MINGNTMinimum Grant Register (Device 1) .......................................... 59
MAXLATMaximum Latency Register (Device 1) ..................................... 59
PM_CAPIDPower Management Capabilities ID Register (Device 1) ...... 60
PM_CAPPower Management Capabilities Register (Device 1)............... 60
PM_CS—Power Management Control/Status Register (Device 1)............ 61
DRT—DRAM Row Type.............................................................................. 62
DRAMCL—DRAM Control Low ................................................................... 63
DRAMCH—DRAM Control High.................................................................. 64
GRXGRX Graphics Controller Index Register ......................................... 65
MSRMiscellaneous Output ...................................................................... 66
GR06Miscellaneous Register .................................................................. 67
GR10Address Mapping............................................................................ 68
GR11Page Selector ................................................................................. 68
Memory Address Ranges ............................................................................ 70
GMCHCFG GMCH Configuration Register (Device 0) ............................. 37
Compatibility Area........................................................................... 71
Extended Memory Area .................................................................. 73
Datasheet
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