NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 35

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

3.4.8.
3.4.9.
3.4.10.
Datasheet
R
MLT    Master Latency Timer Register (Device 0)
HDR    Header Type Register (Device 0)
SVIDSubsystem Vendor Identification Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
MLT Function has moved to the ICH; therefore, this register is not implemented in the GMCH.
Offset:
Default:
Access:
Size:
This register identifies the header layout of the configuration space. No physical register exists at this
location.
Offset:
Default:
Access:
Size:
15:0
7:0
7:0
Bit
Bit
Bit
Subsystem Vendor ID—R/WO. This value is used to identify the vendor of the subsystem. This field
should be programmed by BIOS during boot-up. Once written, this register becomes read only. This
register can only be cleared by a reset.
Master Latency Timer Value. This read only field always returns 0’s.
Header Type. This read only field always returns 0’s.
0Dh
00h
Read Only
8 bits
0Eh
00h
Read Only
8 bits
2C–2Dh
0000h
Read/Write Once
16 bits
Descriptions
Descriptions
Description
Intel
®
82810E (GMCH)
35