NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 48
NH82810 S L7XK
Manufacturer Part Number
NH82810 S L7XK
Description
Manufacturer
Intel
Datasheet
1.NH82810_S_L7XK.pdf
(119 pages)
Specifications of NH82810 S L7XK
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Intel
48
®
82810E (GMCH)
11:10
Bit
9:8
7:6
5:4
3:2
1:0
12
SCS3# Buffer Strength. This field sets the buffer strength for system memory chip buffer SCS3#.
0 = 3x: (6 to 8 loads)
1 = 2x: (2 to 4 loads)
load = (64 / SDRAM width for Row 3, if populated)
SMAA[7:4] Buffer Strength. This field sets the buffer strength for SMAA[7:4] buffers.
00 = 4x: (12 to 16 loads)
01 = 3x: (8 to 10 loads)
10 = 2x: (4 to 6 loads)
11 = 1x: (2 loads)
load = (64 / SDRAM width for Row 0, if populated) + (64 / SDRAM width for Row 1, if populated)
SMAB[7:4] Buffer Strength. This field sets the buffer strength for SMAB[7:4] buffers.
00 = 4x: (12 to 16 loads)
01 = 3x: (8 to 10 loads)
10 = 2x: (4 to 6 loads)
11 = 1x: (2 loads)
load = (64 / SDRAM width for Row 2, if populated) + (64 / SDRAM width for Row 3, if populated)
CKE1 Buffer Strength. This field sets the buffer strength for CKE1 buffers.
00 = 4x: (10 to 16 loads)
01 = 3x: (6 to 8 loads)
10 = 2x: (2 to 4 loads)
11 = 1x: (0 load)
Load = (64 / SDRAM width for Row 1, if populated) + (64 / SDRAM width for Row 3, if populated)
CKE0 Buffer Strength. This field sets the buffer strength for CKE0 buffers.
00 = 4x: (10 to 16 loads)
01 = 3x: (6 to 8 loads)
10 = 2x: (2 to 4 loads)
11 = 1x: (0 load)
Load = (64 / SDRAM width for Row 0, if populated) + (64 / SDRAM width for Row 2, if populated)
SMD [63:0] and SDQM [7:0] Buffer Strength. This field sets the buffer strength for SMD [63:0] and
SDQM [7:0] pins.
00 = 2.5x: (4 loads)
01 = 1.5x: (2 to 3 loads)
10 = 1x: (1 load)
11 = 1x: (invalid setting for SDQM[7:0])
Note: BUFF_SC[3:2] = 11 is an invalid state for SDQM[7:0]. For the 1x buffer strength configuration, set
Load = 1 for each populated row, totaled for all DIMMs
SWE#, SCAS#, SRAS#, MAA [11:8, 3:0], SBS [1:0] Control Buffer Strength. This field sets the buffer
strength for SWE#, SCAS#, SRAS#, MAA [11:8, 3:0], and SBS [1:0] pins.
00 = 4x: (Not Applicable)
01 = 3x: (22 to 32 loads)
10 = 2x: (8 to 20 loads)
11 = 1x: (2 to 6 loads)
Load = (64 / SDRAM width for Row 0, if populated) + (64 / SDRAM width for Row 1, if populated) +
(64 / SDRAM width for Row 2, if populated) + (64 / SDRAM width for Row 3, if populated)
BUFF_SC[3:2] = 10.
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