BLF6G10LS-135R,112 NXP Semiconductors, BLF6G10LS-135R,112 Datasheet - Page 7

IC BASESTATION FINAL SOT502B

BLF6G10LS-135R,112

Manufacturer Part Number
BLF6G10LS-135R,112
Description
IC BASESTATION FINAL SOT502B
Manufacturer
NXP Semiconductors

Specifications of BLF6G10LS-135R,112

Package / Case
SOT502B
Transistor Type
LDMOS
Frequency
871.5MHz
Gain
21dB
Voltage - Rated
65V
Current Rating
32A
Current - Test
950mA
Voltage - Test
28V
Power - Output
26.5W
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.1 Ohms
Drain-source Breakdown Voltage
65 V
Gate-source Breakdown Voltage
13 V
Continuous Drain Current
32 A
Maximum Operating Temperature
+ 225 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
Channel Type
N
Channel Mode
Enhancement
Drain Source Voltage (max)
65V
Output Power (max)
26.5W(Typ)
Power Gain (typ)@vds
21@28VdB
Frequency (min)
869MHz
Frequency (max)
894MHz
Package Type
LDMOST
Pin Count
3
Forward Transconductance (typ)
13S
Drain Source Resistance (max)
100(Typ)@6.15Vmohm
Reverse Capacitance (typ)
2@28VpF
Operating Temp Range
-65C to 225C
Drain Efficiency (typ)
28%
Mounting
Surface Mount
Mode Of Operation
2-Carrier W-CDMA
Number Of Elements
1
Vswr (max)
10
Screening Level
Military
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Noise Figure
-
Lead Free Status / Rohs Status
Compliant
Other names
934061247112
BLF6G10LS-135R
BLF6G10LS-135R
1.1 Mobile Communication Infrastructure
1.1.1 Base stations (all cellular standards and frequencies)
See also brochure: 'Your partner in Mobile Communication Infrastructure design': document number: 9397 750 16837.
Application diagram
Above diagram shows a simplified base station block diagram with its two main branches: transmit (upper half, TX) and receive (lower half, RX).
Walking along the transmit branch, after the interfacing into the signal processing part, one first encounters the digital to analog converters (DAC), which include a
serial interface in our case (SER). The transmit signal then passes a low-pass filter block (LPF) and is being upconverted in the IQ mixer stage. Next follows a variable
gain amplifier (VGA), a bandpass filter (TX BPF) and the power amplifier board with a medium power amplifier- (MPA) and the high power amplifier (HPA)stages.
An isolater and duplexer are the last two basic blocks up to the antenna. A feedback line is provided to monitor the transmitted signal. The TX signal is “sampled”,
down-converted in a mixer, amplified (VGA), bandpassfiltered (BPF) and converted to digital by an analog to digital converter (SER ADC), with a high speed serial
interface.
The main RX branch of the base station starts at the duplexer, is amplified by a low noise amplifier (LNA) and band pass filtered (RX BPF) very close to the antenna in
a “tower mounted amplifier”. A further amplifier (LNA) then feeds into the down conversion mixer; the I and Q base band signals are further amplified (VGA) and via
a low pass filter (LPF) fed into the respective ADC’s (SER I-ADC and SER Q-DAC).
The serial interface in turn connects to the base band signal processing unit. The synchronizing “heartbeats” in the diagram are controlled by phase locked loops
(PLL) with or without a voltage controlled oscillator (VCO). Microcontrollers (μC) provide local control and monitoring functions within the building blocks.
The colored building blocks can all be sourced by NXP and are discussed in the following paragraphs.
PROCESSING
SIGNAL
SER Q-DAC
SER Q-ADC
SER I-DAC
SER I-ADC
PLL
SER ADC
PLL
µC
PLL VCO
BPF
LPF
LPF
LPF
LPF
PLL VCO
PLL VCO
IQ MIXER
VGA
VGA
VGA
MIXER
MIXER
0
90
IQ MIXER
MIXER
MIXER
mixer
0
90
VGA
TX BPF
LNA
NXP Semiconductors RF Manual 14
MPA
AMPLIFIER
RX BPF
MOUNTED
Processing
RF small signal
RF POWER BOARD
TOWER
µC
HPA
LNA
ISOLATOR
DUPLEXER
Dataconverters
RF power
th
edition
ANTENNA
TX/RX
brb411
9

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