CS1D-II102D Omron, CS1D-II102D Datasheet - Page 417

• Manufacturer Part Number: CS1D-II102D
• Description: CS1D Dual IO Interface Unit
• Manufacturer: Omron

Specifications of CS1D-II102D

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Instruction Execution Times and Number of Steps
9-5-29 Block Programming Instructions
382
CONVERT
ADDRESS
FROM CV
CONVERT
ADDRESS TO
CV
DISABLE
PERIPHERAL
SERVICING
ENABLE
PERIPHERAL
SERVICING
BLOCK PRO-
GRAM BEGIN
BLOCK PRO-
GRAM END
BLOCK PRO-
GRAM PAUSE
BLOCK PRO-
GRAM
RESTART
CONDI-
TIONAL
BLOCK EXIT
CONDI-
TIONAL
BLOCK EXIT
CONDI-
TIONAL
BLOCK EXIT
(NOT)
Branching
Branching
Branching
(NOT)
Instruction
Instruction
FRMCV
TOCV
IOSP
IORS
BPRG
BEND
BPPS
BPRS
Execution
condition
EXIT
EXIT (bit
address)
EXIT NOT
(bit
address)
Execution
condition
IF
IF (relay
number)
IF NOT
(relay num-
ber)
Mnemonic
Mnemonic
Note
284
285
287
288
096
801
811
812
806
806
806
802
802
802
Code
Code
1. When a double-length operand is used, add 1 to the value shown in the
2. Not supported by Duplex CPU Systems.
length column in the following table.
3
3
1
1
2
1
2
2
1
2
2
1
2
2
Length
Length
(steps)
(steps)
13.6
11.9
(See note
2.)
(See note
2.)
12.1
9.6
10.6
5.1
10.0
4.0
6.8
4.7
12.4
7.1
4.6
6.7
6.8
9.0
7.1
9.2
CPU6@H
CPU6@H
(Duplex
(Duplex
CPU)
CPU)
Execution time ( s)
Execution time ( s)
13.6
11.9
13.9
63.6
12.1
9.6
10.6
5.1
10.0
4.0
6.8
4.7
12.4
7.1
4.6
6.7
6.8
9.0
7.1
9.2
CPU6@S
CPU6@S
(Single
(Single
CPU)
CPU)
19.9
17.2
19.8
92.3
13.0
12.3
12.3
5.6
11.3
4.9
13.5
7.2
14.0
7.6
4.8
7.3
7.2
9.6
7.6
10.1
CPU4@S
CPU4@S
(Single
(Single
CPU)
CPU)
---
---
---
---
---
---
---
---
EXIT condition sat-
isfied
EXIT condition not
satisfied
EXIT condition sat-
isfied
EXIT condition not
satisfied
EXIT condition sat-
isfied
EXIT condition not
satisfied
IF true
IF false
IF true
IF false
IF true
IF false
Conditions
Conditions
Section 9-5