CS1D-II102D Omron, CS1D-II102D Datasheet - Page 396

• Manufacturer Part Number: CS1D-II102D
• Description: CS1D Dual IO Interface Unit
• Manufacturer: Omron

Specifications of CS1D-II102D

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9-5-3
Instruction Execution Times and Number of Steps
SINGLE BIT
SET
SINGLE BIT
RESET
SINGLE BIT
OUTPUT
END
NO OPERA-
TION
INTERLOCK
INTERLOCK
CLEAR
MULTI-INTER-
LOCK DIFFER-
ENTIATION
HOLD
MULTI-INTER-
LOCK DIFFER-
ENTIATION
RELEASE
MULTI-INTER-
LOCK CLEAR
JUMP
JUMP END
CONDI-
TIONAL JUMP
CONDI-
TIONAL JUMP
NOT
MULTIPLE
JUMP
MULTIPLE
JUMP END
Instruction
Instruction
Sequence Control Instructions
SETB
!SETB
RSTB
!RSTB
OUTB
!OUTB
END
NOP
IL
ILC
MILH
MILR
MILC
JMP
JME
CJP
CJPN
JMP0
JME0
Mnemonic
Mnemonic
Note
532
532
534
534
534
534
001
000
002
003
517
518
519
004
005
510
511
515
516
Code
Code
1. When a double-length operand is used, add 1 to the value shown in the
2. Not supported by Duplex CPU Systems.
length column in the following table.
2
3
2
3
2
3
1
1
1
1
3
3
2
2
2
2
2
1
1
Length
Length
(steps)
(steps)
0.24
(See note
2.)
0.24
(See note
2.)
0.22
(See note
2.)
5.5
0.02
0.06
0.06
(See note
2.)
(See note
2.)
(See note
2.)
0.38
---
0.38
0.38
0.06
0.06
CPU6@H
CPU6@H
(Duplex
(Duplex
CPU)
CPU)
Execution time ( s)
Execution time ( s)
0.24
+21.44
0.24
+21.44
0.22
+21.42
5.5
0.02
0.06
0.06
6.1
7.5
8.9
6.1
7.5
8.9
5.0
5.7
0.38
---
0.38
0.38
0.06
0.06
CPU6@S
CPU6@S
(Single
(Single
CPU)
CPU)
0.34
+21.54
0.34
+21.54
0.32
+21.52
6.0
0.04
0.06
0.06
6.5
7.9
9.7
6.5
7.9
9.7
5.6
6.2
0.48
---
0.48
0.48
0.06
0.06
CPU4@S
CPU4@S
(Single
(Single
CPU)
CPU)
---
---
---
---
---
---
---
---
---
---
During interlock
Not during interlock
and interlock not
set
Not during interlock
and interlock set
During interlock
Not during interlock
and interlock not
set
Not during interlock
and interlock set
Interlock not
cleared
Interlock cleared
---
---
When JMP condi-
tion is satisfied
When JMP condi-
tion is satisfied
---
---
Conditions
Conditions
Section 9-5
361