CS4525-CNZR Cirrus Logic Inc, CS4525-CNZR Datasheet - Page 84

• Manufacturer Part Number: CS4525-CNZR
• Description: IC PWM Controller+power Stage
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZR

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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9.15
9.15.1 ADC Invert Signal Polarity (InvADC)
9.15.2 Invert Channel PWM Signal Polarity (InvChX)
9.15.3 Invert Sub PWM Signal Polarity (InvSub)
9.15.4 ADC Channel Mute (MuteADC)
9.15.5 Independent Channel A & B Mute (MuteChX)
InvADC
7
Mute/Invert Control (Address 5Bh)
Default = 0
Function:
When set, the signal polarity of the ADC will be inverted.
Default = 0
Function:
When set, the respective channel’s power and logic-level PWM output signal polarity will be inverted. The
serial output on the auxiliary and delay ports are unaffected.
Default = 0
Function:
When set, the Sub channel’s power and logic-level PWM output polarity will be inverted. The serial output
on the auxiliary port is unaffected.
Default = 0
Function:
The output of the ADC will mute when enabled.
Default = 0
Function:
The respective channel’s power PWM, logic-level PWM, and auxiliary serial data outputs will enter a mute
state when enabled. The delay serial output will be unaffected if the delay port is enabled. The muting
InvADC Setting
InvChX Setting
InvSub Setting
MuteADC Setting
0 .......................................... ADC signal polarity not inverted.
1 .......................................... ADC signal polarity inverted.
0 .......................................... Channel X PWM signal polarity not inverted.
1 .......................................... Channel X PWM signal polarity inverted.
0 .......................................... Sub channel PWM signal polarity not inverted.
1 .......................................... Sub channel PWM signal polarity inverted.
0 .......................................... ADC un-muted.
1 .......................................... ADC muted.
InvSub
6
InvCh2
ADC Signal Inversion State
Channel X PWM Signal Inversion State
Sub Channel PWM Signal Inversion State
ADC Mute State
5
InvCh1
4
MuteADC
3
MuteSub
2
MuteChB
1
CS4525
MuteChA
DS726PP3
0