CS4525-CNZR Cirrus Logic Inc, CS4525-CNZR Datasheet - Page 22

IC PWM Controller+power Stage

CS4525-CNZR

Manufacturer Part Number
CS4525-CNZR
Description
IC PWM Controller+power Stage
Manufacturer
Cirrus Logic Inc
Series
Popguard®r
Type
Class Dr
Datasheet

Specifications of CS4525-CNZR

Output Type
2-Channel (Stereo) or 4-Channel (Quad)
Max Output Power X Channels @ Load
30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
Voltage - Supply
8 V ~ 18 V
Features
ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
Mounting Type
Surface Mount
Package / Case
48-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1586 - REFERENCE BOARD FOR CS4525 PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS4525-CNZR
Manufacturer:
CIRRUSLOGICINC
Quantity:
20 000
22
AUX SERIAL AUDIO I/O PORT SWITCHING SPECIFICATIONS
AGND = DGND = PGND = 0 V; T
Logic 0 = DGND; Logic 1 = VD;
Notes:
Input Source: Analog Inputs (Internal ADC)
Output Sample Rate
(Note 16)
AUX_LRCK Duty Cycle
AUX_LRCK Period
AUX_SCLK Frequency
(Note 16)
AUX_SCLK Duty Cycle
AUX_SCLK Period
Input Source: Serial Audio Input Port
Output Sample Rate
AUX_LRCK Duty Cycle
AUX_LRCK Period
AUX_SCLK Frequency
(Note 14)
AUX_SCLK Duty Cycle
AUX_SCLK Period
(Note
Input Source: Analog Inputs or Serial Audio Input Port
AUX_LRCK Rising Edge to AUX_SCLK Falling Edge
AUX_SCLK Rising Edge to Data Output Valid
DLY_SDIN Setup Time Before AUX_SCLK Rising Edge
DLY_SDIN Hold Time After AUX_SCLK Rising Edge
13, 14)
11. F
12. F
13. May vary during normal operation.
14. F
T
CLK
CLK
SI
SCLKI
is the frequency of the input LRCK signal. T
is the frequency of the crystal connected to the XTI/XTO pins or the input SYS_CLK signal.
= 1/F
is the frequency of the input SCLK signal. T
Parameters
CLK
F
F
F
S-In
S-In
S-In
Figure 8. AUX Serial Port Interface Master Mode Timing
AUX_SDOUT
DLY_SDOUT
.
AUX_LRCK
AUX_SCLK
DLY_SDIN
= 32kHz, 44.1 kHz, 48 kHz
= 32kHz, 44.1 kHz, 48 kHz
= 32kHz, 44.1 kHz, 48 kHz
(Note 11)
A
= 25°C; VD = 3.3 V; AUX_SDOUT & DLY_SDOUT C
ClkFreq[1:0] = ‘01’
ClkFreq[1:0] = ‘10’
ClkFreq[1:0] = ‘00’
ClkFreq[1:0] = ‘01’
ClkFreq[1:0] = ‘10’
ClkFreq[1:0] = ‘00’
LSB
LSB
.
F
F
F
t
(Note
DISU
S-In
S-In
S-In
(Note 13)
= 96 kHz
= 96 kHz
= 96 kHz
12, 13)
Symbol
t
MSB
MSB
LTSF
F
t
t
SCLKO
SRDV
F
F
LTSF
t
t
DIS
DIH
SO
SO
SI
= 1/F
SCLKI
2*T
T
SCLKI
T
SCLKI
SI
SI
Min
= 1/F
45
- T
30
25
10
t
t
-
-
-
-
-
-
-
-
-
-
-
-
-
SRDV
DIH
-
-
-
- T
CLK
- T
CLK
SCLKI
CLK
MSB - 1
MSB - 1
.
F
F
F
1/F
2*T
F
48*F
64*F
64*F
CLK
CLK
CLK
F
T
1/F
SCLKI
F
Typ
SCLKI
SCLKI
SCLKO
F
T
50
50
SI
SCLKI
-
-
-
-
-
-
SI
SI
/384
/512
/512
SO
/2
SO
SO
SO
/2
2*T
T
SCLKI
T
T
SCLKI
L
SI
CLK
= 15 pF; Inputs:
Max
+ T
55
70
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+ T
+ 20
+ T
CLK
CS4525
CLK
DS726PP3
CLK
Units
Hz
Hz
Hz
Hz
Hz
Hz
Hz
Hz
Hz
Hz
ns
ns
ns
ns
%
%
%
%
s
s
s
s
s

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