CS4525-CNZR Cirrus Logic Inc, CS4525-CNZR Datasheet - Page 74

• Manufacturer Part Number: CS4525-CNZR
• Description: IC PWM Controller+power Stage
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZR

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

74
9.5
9.5.1
9.5.2
9.5.3
SelectVP
7
Foldback and Ramp Configuration (Address 05h)
only be changed while all modulators and associated logic are in the power-down state (the PDnAll bit is
set). Attempts to write these bits while the PDnAll bit is cleared will be ignored. See
on page 55
Select VP Level (SelectVP)
Default = 1
Function:
Adjusts the PWM modulation index to maximize output power for applications with a nominal VP voltage
of less than or equal to 14 V. This bit must remain set for applications with a nominal VP voltage greater
than 14 V.
Enable Thermal Foldback (EnTherm)
Default = 0
Function:
Enables the thermal foldback feature. See
Lock Foldback Adjust (LockAdj)
Default = 0
Function:
Controls the operation of the foldback lock adjustment feature. See
more information.
OutputDly[3:0] Setting
SelectVP Setting
EnTherm Setting
LockAdj Setting
0000 .................................... 0 - No Delay
0001 .................................... 1
0010 .................................... 2
1000 .................................... 8
1111 ..................................... 15 - Max Delay
0 .......................................... VP ≤ 14 Volts
1 .......................................... VP > 14 Volts.
0 .......................................... Disabled.
1 .......................................... Enabled.
0 .......................................... Attenuation lock disabled.
1 .......................................... Attenuation lock enabled.
....................................
....................................
EnTherm
6
for more information.
LockAdj
Output Delay in Input Clock Source Cycles
Selected VP Level
Thermal Foldback State
Foldback Adjustment Lock State
5
AttackDly1
4
“Thermal Foldback” on page 40
AttackDly0
3
EnFloor
2
“Thermal Foldback” on page 40
for more information.
RmpSpeed1
“PWM Channel Delay”
1
RmpSpeed0
CS4525
DS726PP3
0
for