CS4525-CNZR Cirrus Logic Inc, CS4525-CNZR Datasheet - Page 46

• Manufacturer Part Number: CS4525-CNZR
• Description: IC PWM Controller+power Stage
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZR

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

46
6.1.8
charged and discharged. The Popguard technology has no effect on the PWM_SIG outputs nor the aux-
iliary serial output.
The PWM Popguard feature is disabled by default; to enable it, the RmpSpd[1:0] register must be set to
any value other than 11. The PWM Popguard feature should only be used when the power outputs are
configured for stereo half-bridge with full-bridge sub per
connected to the VP supply through a 0.033 µF capacitor whenever the PWM Popguard technology is
enabled, as shown in
The output ramp time will vary depending on the voltage applied to VP and the value of the RmpSpd[1:0]
bits; typical ramp times are listed in
and PWM Popguard feature is disabled by default.
Logic-Level PWM Outputs
The CS4525 has two configurable logic-level PWM outputs, PWM_SIG1 and PWM_SIG2. These outputs
can be used as either digital input to an external PWM amplifier such as the CS4412, or as an analog
input to a headphone amplifier or a line-out amplifier.
To eliminate power-up pops when used to supply an external PWM amplifier, the CS4525 implements the
same click-free start-up function on the PWM_SIG outputs as it does for its own powered PWM outputs.
This function can only be utilized if the PWM amplifier has an initial transition delay feature, such as the
CS4412A. To eliminate power-up and power-down pops when used to supply an analog output circuit,
the PWM_SIG outputs support a high-impedance state that is controlled by the HiZPSig bit in the
EQ Config register. This bit is active-low and cleared by default. To use the PWM_SIG outputs, the HiZ-
PSig bit must be set to enable the PWM_SIG output drivers.
Referenced Control
RmpSpeed[1:0] ...................
PDnAll .................................
PDnOutX .............................
VP Voltage
12 V
15 V
18 V
+8V to +18V
Table 9. Typical Ramp Times for Various VP Voltages
Figure
Register Location
“Ramp Speed (RmpSpd[1:0])” on page 75
“Power Down (PDnAll)” on page 89
“Power Down PWM Power Output X (PDnOutX)” on page 89
RmpSpd[1:0] = 00
Figure 19. Popguard Connection Diagram
2.16 seconds
1.74 seconds
1.40 seconds
19.
0.033 uF
CS4525
Table
9. All output channels are affected by the RmpSpeed[1:0] bits,
OUT1
OUT2
OUT3
OUT4
RmpSpd[1:0] = 01
2.20 seconds
1.76 seconds
1.42 seconds
Typical Ramp Up Times
bridge
bridge
bridge
Filter
Filter
Filter
Half-
Half-
Full-
Section
RmpSpd[1:0] = 10
6.1.7.1. The RAMP_CAP pin must be
2.20 seconds
1.78 seconds
1.44 seconds
Subwoofer
Left
Speaker
Right
Speaker
RmpSpd[1:0] = 11
Instant (No Ramp)
Instant (No Ramp)
Instant (No Ramp)
CS4525
DS726PP3