IPR-RLDII/UNI Altera, IPR-RLDII/UNI Datasheet - Page 67

IP CORE Renewal Of IP-RLDII/UNI

IPR-RLDII/UNI

Manufacturer Part Number
IPR-RLDII/UNI
Description
IP CORE Renewal Of IP-RLDII/UNI
Manufacturer
Altera
Datasheet

Specifications of IPR-RLDII/UNI

Software Application
IP CORE, Memory Controllers, SDRAM
Supported Families
Arria II GZ, Stratix III, Stratix IV, HardCopy III
Core Architecture
FPGA
Core Sub-architecture
Arria, HardCopy, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Chapter 7: Functional Description—Example Top-Level Project
Example Driver
December 2010 Altera Corporation
The data corrupter is created when you turn on Enable Error Detection Parity under
Controller Settings on the General Settings tab of the parameter editor. The data
corrupter resides in data_corrupter.sv in the rtl_sim subdirectory.
Section IV. RLDRAM II Controller with UniPHY IP User Guide
External Memory Interface Handbook Volume 3
7–5

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