IPR-ED8B10B Altera, IPR-ED8B10B Datasheet - Page 7

• Manufacturer Part Number: IPR-ED8B10B
• Description: IP CORE Renewal Of IP-ED8B10B
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-ED8B10B

• Software Application: IP CORE, Interface And Protocols, COMMUNICATION
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Encoder/Decoder, 8b/10b for Gigabit Ethernet and Fibre Channel
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 1: About This MegaCore Function
Performance and Resource Utilization
Performance and Resource Utilization
Table 1–3. Resource Utilization and Performance (Cyclone II and Cyclone III)
Table 1–4. Resource Utilization and Performance (Stratix II and Stratix III)
Installation and Licensing
© November 2009 Altera Corporation
Cyclone II
Cyclone III
Note to
(1) f
Stratix II
Stratix III
Note to
(1) f
MAX
MAX
Table
Table
Device
Device
is for non-cascaded encoders/decoders.
is for non-cascaded encoders/decoders.
1–3:
1–4:
This section lists the resource utilization and performance of the 8B10B
Encoder/Decoder MegaCore function in different Altera device families. These
results were obtained using the Quartus
replacement feature disabled. Enabling this feature produces a smaller but slower
MegaCore function.
Table 1–3
(EP2C35F484C6) and Cyclone III (EP3C80F780C6).
Table 1–4
(EP2S30F484C3) and Stratix III (EP3SE110F780C2). The performance of the MegaCore
function in Stratix IV devices is similar to Stratix III devices.
The 8B10B Encoder/Decoder MegaCore Function is part of the MegaCore
which is distributed with the Quartus
website, www.altera.com.
Mode of Operation
Mode of Operation
Encoder
Encoder
Decoder
Encoder
Encoder
Decoder
Encoder
Encoder
Decoder
Encoder
Encoder
Decoder
shows the performance and resource utilization for Cyclone II
shows the performance and resource utilization for Stratix II
Parameters
Parameters
Inputs/Outputs
Inputs/Outputs
Register
Preliminary
Register
Off
Off
On
On
–
–
Off
Off
On
On
–
–
®
II software and downloadable from the Altera
®
Combinational
II software version 9.1 with the auto-ROM
ALUTs
8B10B Encoder/Decoder MegaCore Function User Guide
61
68
55
60
68
55
100
107
131
100
107
131
LEs
Registers
Logic
51
13
33
51
13
33
fMAX (MHz)
fMAX (MHz)
250
454
403
250
454
403
®
IP Library,
444
585
447
510
675
520
(1)
(1)
1–3
®