IPR-ED8B10B Altera, IPR-ED8B10B Datasheet - Page 26

• Manufacturer Part Number: IPR-ED8B10B
• Description: IP CORE Renewal Of IP-ED8B10B
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-ED8B10B

• Software Application: IP CORE, Interface And Protocols, COMMUNICATION
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Encoder/Decoder, 8b/10b for Gigabit Ethernet and Fibre Channel
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

3–8
Parameters
Signals
Encoder Signals
Table 3–3. Encoder Signals
8B10B Encoder/Decoder MegaCore Function User Guide
clk
reset_n
kin
ena
idle_ins
datain[7:0]
rdin
rdforce
kerr
dataout[9:0]
valid
rdout
rdcascade
Signal Name
Table 3–2
set in the MegaWizard Interface (see
Table 3–2. 8B10B Encoder/Decoder Parameters
This section describes all interface signals.
Table 3–3
Mode of operation
Register inputs/outputs
Direction
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Output
shows the 8B10B Encoder/Decoder function parameters, which can only be
show the encoder signals.
Clock. The input is latched, and the result is output on this clock. There is a three clock
cycle latency between the input and output.
Active low, reset. Asynchronously resets all registers in the MegaCore function. This
signal should be deasserted synchronously to the rising edge of clk.
Command byte indicator. When high, indicates that the input is a command byte, not a
data byte.
Enable encoder signal. When high, indicates that the data currently present on the
datain input is to be encoded.
Idle character insert. When high, idle (K28.5) characters are inserted when ena is not
asserted.
Data input. This is the 8-bit input word, data or command.
Running disparity input. When rdforce is high, the value on this pin is used as the
current running disparity instead of the internally generated one.
Force running disparity. When high, the rdin value overrides the internally generated
running disparity.
Special K character error. This signal is set high when ena and kin are high and the
value on datain is not a valid special K character.
Data output. This is the 10-bit encoded output.
Valid signal. When high, indicates that a valid encoded word is present on the
dataout output.
Running disparity output. The current running disparity (after encoding the word
present on the dataout output).
Cascaded running disparity. Used when encoders are cascaded.
Parameter
Preliminary
“Parameterize” on page
Encoder or Decoder
On for a three cycle latency.
Off for a one-cycle latency.
Description
© November 2009 Altera Corporation
Value
2–3).
Chapter 3: Specifications
Parameters