DP83865DVH National Semiconductor, DP83865DVH Datasheet - Page 3

10/100/1000BASE-T TRANSCEIVER, SMD

DP83865DVH

Manufacturer Part Number
DP83865DVH
Description
10/100/1000BASE-T TRANSCEIVER, SMD
Manufacturer
National Semiconductor
Datasheets

Specifications of DP83865DVH

Data Rate
1000Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3u, IEEE 802.3z
Supply Current
430µA
Supply Voltage Range
2.375V To 2.625V, 3.135V To 3.465V
Operating Temperature Range
0°C To +70°C
Interface Type
GMII, MII, RGMII
Rohs Compliant
Yes
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
1.0
2.0
3.0
4.0
5.0
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
Register Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1
2.2
2.3
Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.16
3.17
3.18
3.19
3.20
3.21
3.22
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
Design Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
5.12
5.13
MAC Interfaces (MII, GMII, and RGMII)
Management Interface
Media Dependent Interface
JTAG Interface
Clock Interface
Device Configuration and LED Interface . . . . . . . . 8
Reset
Power and Ground Pins . . . . . . . . . . . . . . . . . . . . 11
Special Connect Pins
Pin Assignments in the Pin Number Order
Register Definitions . . . . . . . . . . . . . . . . . . . . . . . 18
Register Map
Register Description . . . . . . . . . . . . . . . . . . . . . . 21
Accessing Expanded Memory Space . . . . . . . . . 40
Manual Configuration . . . . . . . . . . . . . . . . . . . . . . 40
Auto-Negotiation . . . . . . . . . . . . . . . . . . . . . . . . . 41
Auto-Negotiation Register Set . . . . . . . . . . . . . . . 44
Auto-MDIX resolution . . . . . . . . . . . . . . . . . . . . . . 44
Polarity Correction . . . . . . . . . . . . . . . . . . . . . . . . 45
PHY Address, Strapping Options and LEDs . . . . 45
Reduced LED Mode . . . . . . . . . . . . . . . . . . . . . . 45
Modulate LED on Error . . . . . . . . . . . . . . . . . . . . 45
MAC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Clock to MAC Enable . . . . . . . . . . . . . . . . . . . . . . 46
MII/GMII/RGMII Isolate Mode . . . . . . . . . . . . . . . 46
Loopback Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 46
IEEE 802.3ab Test Modes . . . . . . . . . . . . . . . . . . 46
Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Low Power Mode / WOL . . . . . . . . . . . . . . . . . . . 47
Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . 47
BIST Configuration . . . . . . . . . . . . . . . . . . . . . . . 47
Cable Length Indicator . . . . . . . . . . . . . . . . . . . . . 48
10BASE-T Half Duplex Loopback . . . . . . . . . . . . 48
I/O Voltage Selection . . . . . . . . . . . . . . . . . . . . . . 48
Non-compliant inter-operability mode . . . . . . . . . 48
1000BASE-T PCS Transmitter . . . . . . . . . . . . . . 49
1000BASE-T PMA Transmitter . . . . . . . . . . . . . . 50
1000BASE-T PMA Receiver . . . . . . . . . . . . . . . . 50
1000BASE-T PCS Receiver . . . . . . . . . . . . . . . . 51
Gigabit MII (GMII) . . . . . . . . . . . . . . . . . . . . . . . . 52
Reduced GMII (RGMII) . . . . . . . . . . . . . . . . . . . . 53
10BASE-T and 100BASE-TX Transmitter . . . . . . 54
10BASE-T and 100BASE-TX Receiver . . . . . . . . 57
Media Independent Interface (MII) . . . . . . . . . . . . 60
Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Power Supply Decoupling . . . . . . . . . . . . . . . . . . 64
Sensitive Supply Pins . . . . . . . . . . . . . . . . . . . . . 64
PCB Layer Stacking . . . . . . . . . . . . . . . . . . . . . . . 64
Layout Notes on MAC Interface . . . . . . . . . . . . . . 66
Twisted Pair Interface . . . . . . . . . . . . . . . . . . . . . 66
RJ-45 Connections . . . . . . . . . . . . . . . . . . . . . . . 67
LED/Strapping Option . . . . . . . . . . . . . . . . . . . . . 67
Unused Pins and Reserved Pins . . . . . . . . . . . . . 67
I/O Voltage Considerations . . . . . . . . . . . . . . . . . 68
Power-up Recommendations . . . . . . . . . . . . . . . 68
Component Selection . . . . . . . . . . . . . . . . . . . . . 68
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
. . . . . . . . . . . . . . . . . . . . . . . . . . 19
. . . . . . . . . . . . . . . . . . . . . . . . . . 7
. . . . . . . . . . . . . . . . . . . . . . . . . . 8
. . . . . . . . . . . . . . . . . . . . 11
. . . . . . . . . . . . . . . . . . . . 7
. . . . . . . . . . . . . . . . 7
Table of Contents
. . . . . . . 5
. . . . 12
3
6.0
7.0
8.0
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . 71
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
Frequently Asked Questions . . . . . . . . . . . . . . . . . . . 82
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . 86
DC Electrical Specification . . . . . . . . . . . . . . . . . 71
Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
1000 Mb/s Timing . . . . . . . . . . . . . . . . . . . . . . . . 74
RGMII Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
100 Mb/s Timing . . . . . . . . . . . . . . . . . . . . . . . . . 77
10 Mb/s Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Loopback Timing . . . . . . . . . . . . . . . . . . . . . . . . 79
Serial Management Interface Timing . . . . . . . . . 80
Power Consumption . . . . . . . . . . . . . . . . . . . . . . 81
Do I need to access any MDIO register to start up
I am trying to access the registers through MDIO
and I got invalid data. What should I do? . . . . . 82
Why can the PHY establish a valid link but can
not transmit or receive data? . . . . . . . . . . . . . . . 82
What is the difference between TX_CLK,
TX_TCLK, and GTX_CLK? . . . . . . . . . . . . . . . . 82
What happens to the TX_CLK during 1000 Mbps
operation? Similarly what happens to RXD[4:7]
during 10/100 Mbps operation? . . . . . . . . . . . . . 82
What happens to the TX_CLK and RX_CLK
during Auto-Negotiation and during idles? . . . . . 82
Why doesn’t the Gig PHYTER V complete Auto-
Negotiation if the link partner is a forced
1000 Mbps PHY? . . . . . . . . . . . . . . . . . . . . . . . . 82
What determines Master/Slave mode when Auto-
Negotiation is disabled in 1000Base-T mode? . . 82
How long does Auto-Negotiation take? . . . . . . . 83
How do I measure FLP’s? . . . . . . . . . . . . . . . . . 83
I have forced 10 Mbps or 100 Mbps operation but
the associated speed LED doesn’t come on. . . . 83
I know I have good link, but register 0x01, bit 2
Your reference design shows pull-up or pull-down
resistors attached to certain pins, which conflict
in the datasheet? . . . . . . . . . . . . . . . . . . . . . . . . 83
How is the maximum package case temperature
calculated? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
The DP83865 will establish Link in 100 Mbps
mode with a Broadcom part, but it will not
establish link in 1000 Mbps mode. When this
happens the DP83865’s Link LED will blink on
and off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
How do I quickly determine the quality of the
What is the power up sequence for DP83865? . 83
What are some other applicable documents? . . 84
the PHY? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
“Link Status” doesn’t contain value ‘1’ indicating
good link. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
with the pull-up or pull-down information specified
link over the cable ? . . . . . . . . . . . . . . . . . . . . . . 83
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