DP83865DVH National Semiconductor, DP83865DVH Datasheet - Page 18

• Manufacturer Part Number: DP83865DVH
• Description: 10/100/1000BASE-T TRANSCEIVER, SMD
• Manufacturer: National Semiconductor

Specifications of DP83865DVH

• Data Rate: 1000Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u, IEEE 802.3z
• Supply Current: 430µA
• Supply Voltage Range: 2.375V To 2.625V, 3.135V To 3.465V
• Operating Temperature Range: 0°C To +70°C
• Interface Type: GMII, MII, RGMII
• Rohs Compliant: Yes
• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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2.0 Register Block
2.1 Register Definitions
Register maps and address definitions are given in the following table:
0x0B-0x0E
0x1B-0x1C
0x1D
0x0A
0x0F
0x1A
0x1E
0x1F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
Hex
Offset
Decimal
11-14
27-28
10
15
16
17
18
19
20
21
22
23
24
25
26
29
30
31
0
1
2
3
4
5
6
7
8
9
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Table 2. Register Block - DP83865 Register Map
EXP_MEM_ADDR
EXP_MEM_DATA
EXP_MEM_CTL
INT_STATUS
STRAP_REG
INT_CLEAR
BIST_CFG1
BIST_CFG2
AUX_CTRL
LED_CTRL
INT_MASK
BIST_CNT
PHY_SUP
PHYIDR1
PHYIDR2
ANNPRR
Reserved
Reserved
ANNPTR
LINK_AN
ANLPAR
1KSTSR
1KSCR
1KTCR
BMCR
BMSR
ANAR
ANER
Tag
18
Basic Mode Control Register
Basic Mode Status Register
PHY Identifier Register #1
PHY Identifier Register #2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page TX
Auto-Negotiation Next Page RX
1000BASE-T Control Register
1000BASE-T Status Register
Reserved
1000BASE-T Extended Status Register
Strap Options Register
Link and Auto-Negotiation Status Register
Auxiliary Control Register
LED Control Register
Interrupt Status Register
Interrupt Mask Register
Expanded Memory Access Control
Interrupt Clear Register
BIST Counter Register
BIST Configuration Register #1
BIST Configuration Register #2
Reserved
Expanded Memory Data
Expanded Memory Address
PHY Support Register
Description