DP83865DVH National Semiconductor, DP83865DVH Datasheet - Page 24

• Manufacturer Part Number: DP83865DVH
• Description: 10/100/1000BASE-T TRANSCEIVER, SMD
• Manufacturer: National Semiconductor

Specifications of DP83865DVH

• Data Rate: 1000Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u, IEEE 802.3z
• Supply Current: 430µA
• Supply Voltage Range: 2.375V To 2.625V, 3.135V To 3.465V
• Operating Temperature Range: 0°C To +70°C
• Interface Type: GMII, MII, RGMII
• Rohs Compliant: Yes
• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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2.0 Register Block
The PHY Identifier Registers #1 and #2 together form a unique identifier for the DP83865. The Identifier consists of a con-
catenation of the Organizationally Unique Identifier (OUI), the vendor’s model number and the model revision number. A
PHY may return a value of zero in each of the 32 bits of the PHY Identifier if desired. The PHY Identifier is intended to sup-
port network management. National’s IEEE assigned OUI is 0x080017h.
15:10
15:0
9:4
3:0
Bit
Bit
Bit
15
14
13
12
11
10
9
VNDR_MDL[5:0]
MDL_REV[3:0]
ASY_PAUSE
100BASE-T4
OUI[19:24]
Bit Name
OUI[3:18]
Bit Name
Bit Name
Reserved
Reserved
PAUSE
Table 7. Auto-Negotiation Advertisement Register (ANAR) address 0x04
NP
RF
(Continued)
Table 5. PHY Identifier Register #1 (PHYIDR1) address 0x02
Table 6. PHY Identifier Register #2 (PHYIDR2) address 0x03
6’b<01_0111>, P OUI Bits 19:24:
16’b<0010_0000
_0000_0000>, P
6’b <00_0111>,
4’b <1010>, P
Default
Default
Default
0, RW
0, RW
0, RW
0, RW
0, RO
0, RO
0, RO
P
OUI Bits 3:18:
Bits 3 to 18 of the OUI (0x080017h) are stored in bits 15 to 0 of
this register. The most significant two bits of the OUI are ignored
(the IEEE standard refers to these as bits 1 and 2).
Bits 19 to 24 of the OUI (0x080017h) are mapped to bits 15 to 10
of this register respectively.
Vendor Model Number:
The six bits of vendor model number are mapped to bits 9 to 4
(most significant bit to bit 9).
Model Revision Number:
Four bits of the vendor model revision number are mapped to bits
3 to 0 (most significant bit to bit 3). This field will be incremented
for all major device changes.
Next Page Indication:
1 = Next Page Transfer desired.
0 = Next Page Transfer not desired.
Reserved by IEEE: Writes ignored, Read as 0.
Remote Fault:
1 = Advertises that this device has detected a Remote Fault.
0 = No Remote Fault detected.
Reserved for Future IEEE use: Write as 0, Read as 0.
Asymmetrical PAUSE:
1 = MAC/Controller supports Asymmetrical Pause direction.
0 = MAC/Controller does not support Asymmetrical Pause direc-
tion.
1 = MAC/Controller supports Pause frames.
0 = MAC/Controller does not support Pause frames.
100BASE-T4 Support:
1 = 100BASE-T4 supported.
0 = No support for 100BASE-T4.
DP83865 does not support 100BASE-T4 mode and this bit
should always be read back as “0”.
PAUSE:
24
Description
Description
Description