MB9BF104RPMC-GE1 Fujitsu Semiconductor America Inc, MB9BF104RPMC-GE1 Datasheet - Page 2

• Manufacturer Part Number: MB9BF104RPMC-GE1
• Description: IC MCU 32BIT 256KB FLASH 120LQFP
• Manufacturer: Fujitsu Semiconductor America Inc
• Series: FM3 MB9B100r

Specifications of MB9BF104RPMC-GE1

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CSIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 120-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 865-1117

 FEATURES
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MB9B100 Series
 32-bit ARM Cortex-M3 Core
 On-chip Memories
 External Bus Interface
 Multi-function Serial Interface (Max. 8channels)
[Flash memory]
[SRAM]
[UART]
[CSIO]
・ Processor version: r2p0
・ Up to 80MHz Frequency Operation
・ Memory Protection Unit (MPU): improve the reliability of an embedded system
・ Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48
・ 24-bit System timer (Sys Tick): System timer for OS task management
・ Up to 512 Kbyte
・ Read cycle: 0wait-cycle@up to 60MHz, 2wait-cycle* above
・ Security function for code protection
MB9B100 Series contain a total of up to 64Kbyte on-chip SRAM memories. This is composed of two
independent SRAM for CPU and DMA Controller can process simultaneously.
・ Up to 32 Kbyte SRAM for high-performance CPU
・ Up to 32 Kbyte SRAM for CPU/DMA Controller
・ Supports SRAM, NOR& NAND Flash device
・ Up to 8 chip selects
・ 8/16-bit Data width
・ Up to 25-bit Address bit
・ 4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3)
・ Operation mode is selectable from the followings for each channel.
・ Full-duplex double buffer
・ Selection with or without parity supported
・ Built-in dedicated baud rate generator
・ External clock available as a serial clock
・ Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)
・ Various error detect functions available (parity errors, framing errors, and overrun errors)
・ Full-duplex double buffer
・ Built-in dedicated baud rate generator
・ Overrun error detect function available
・ UART
・ CSIO
・ LIN
・ I
peripheral interrupts and 16 priority levels
*: Instruction pre-fetch buffer is included. So when CPU access continuously, it becomes 0wait-cycle
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DS706-00007-1v0-E