LFSC3GA25E-7FN900C Lattice, LFSC3GA25E-7FN900C Datasheet - Page 6

• Manufacturer Part Number: LFSC3GA25E-7FN900C
• Description: FPGA - Field Programmable Gate Array 25.4K LUTs 378 3G SERDES 1.2V -7 Spd
• Manufacturer: Lattice

Specifications of LFSC3GA25E-7FN900C

• Number Of Macrocells: 25000
• Number Of Programmable I/os: 132 to 942
• Data Ram Size: 1916928
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 0.95 V
• Package / Case: FPBGA-900
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: *
• Number Of I /o: *
• Number Of Gates: *
• Voltage - Supply: *
• Mounting Type: *
• Operating Temperature: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-1. Simplified Block Diagram (Top Level)
PURESPEED I/O Interface
I/O Cell (PIC) includes
sysCLOCK DLLs
Programmable
Programmable
per four PFUs
Analog PLLs
contains four
Analog PLLs
sysCLOCK
sysCLOCK
Three PICs
I/Os (PIO)
Each PIC
Quad SERDES
2-2
LatticeSC/M Family Data Sheet
Quad SERDES
Architecture
Physical Coding
Sublayer (PCS)
Structured ASIC
Block (MACO)
Programmable
Function
Unit (PFU)
sysMEM Embedded
Block RAM (EBR)
sysCLOCK DLLs