AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 69

• Manufacturer Part Number: AGLE600V2-FGG484
• Description: FPGA - Field Programmable Gate Array 600K System Gates
• Manufacturer: Actel

Specifications of AGLE600V2-FGG484

• Processor Series: AGLE600
• Core: IP Core
• Maximum Operating Frequency: 526.32 MHz, 892.86 MHz
• Number Of Programmable I/os: 270
• Data Ram Size: 110592
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 600 K
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-88 • Minimum and Maximum DC Input and Output Levels
Figure 2-17 • AC Loading
Table 2-89 • AC Waveforms, Measuring Points, and Capacitive Loads
Table 2-90 • HSTL Class I – Applies to 1.5 V DC Core Voltage
Table 2-91 • HSTL Class I – Applies to 1.2 V DC Core Voltage
HSTL Class
I
Drive
Strength
8 mA
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
Input Low (V)
VREF – 0.1
*
Speed Grade
Std.
Note:
Speed Grade
Std.
Note:
Measuring point = V
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operating conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
HSTL Class I
High-Speed Transceiver Logic is a general-purpose high-speed 1.5 V bus standard (EIA/JESD8-6).
IGLOOe devices support Class I. This provides a differential amplifier input buffer and a push-pull output
buffer.
Timing Characteristics
Commercial-Case Conditions: T
Worst-Case VCCI = 1.4 V VREF = 0.75 V
Commercial-Case Conditions: T
Worst-Case VCCI = 1.4 V VREF = 0.75 V
Min.
–0.3
V
1.5 V DC Core Voltage
1.2 V DC Core Voltage
Input High (V)
VREF + 0.1
VIL
VREF – 0.1 VREF + 0.1
t
t
trip
DOUT
0.98
DOUT
1.55
. See
Max.
V
Table 2-22 on page 2-23
2.74
3.10
t
t
DP
DP
Measuring Point* (V)
Min.
V
0.19
0.26
t
t
DIN
DIN
VIH
Test Point
0.75
1.77
1.94
t
t
J
J
Max.
PY
PY
3.6
= 70°C, Worst-Case VCC = 1.425 V,
= 70°C, Worst-Case VCC = 1.14 V,
V
HSTL
Class I
for a complete table of trip points.
t
t
0.67
1.10
EOUT
EOUT
Max.
VOL
R e v i s i o n 8
0.4
V
V
TT
VREF (typ.) (V)
50
2.79
3.12
VCCI – 0.4
20 pF
t
t
ZL
ZL
VOH
Min.
0.75
V
2.73
3.10
t
Table 2-6 on page 2-6
t
Table 2-7 on page 2-6
ZH
ZH
mA mA
I
OL
8
t
t
LZ
LZ
I
OH
8
VTT (typ.) (V)
t
t
IGLOOe Low Power Flash FPGAs
HZ
HZ
0.75
Max.
mA
I
OSH
32
3
6.42
8.93
t
t
ZLS
ZLS
for derating values.
for derating values.
Max.
mA
I
OSL
39
t
6.36
t
8.91
ZHS
ZHS
C
3
LOAD
20
µA
I
IL
10 10
Units
Units
(pF)
1
4
ns
ns
µA
I
2- 55
IH
2
4