AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 62

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AGLE600V2-FGG484

Manufacturer Part Number
AGLE600V2-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGLE600V2-FGG484

Processor Series
AGLE600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
270
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGLE600V2-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AGLE600V2-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
IGLOOe DC and Switching Characteristics
Table 2-68 • Minimum and Maximum DC Input and Output Levels
Figure 2-12 • AC Loading
Table 2-69 • AC Waveforms, Measuring Points, and Capacitive Loads
2- 48
3.3 V PCI/PCI-X
Drive Strength
Per PCI
specification
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
Input Low (V)
0
*
Measuring point = V
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI . Input current is
Test Point
Datapath
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Actel loadings for enable path
characterization are described in
AC loadings are defined per PCI/PCI-X specifications for the datapath; Actel loading for tristate is
described in
R = 25
Min.
V
trip
Input High (V)
VIL
. See
Table
R to VCCI for t
R to GND for t
Max.
3.3
V
Table 2-22 on page 2-23
2-69.
Min.,
V
VIH
DP
DP
Max.
0.285 * VCCI for t
0.615 * VCCI for t
Measuring Point* (V)
V
Figure
(R)
(F)
Max.
VOL
2-12.
Per PCI curves
Enable Path
V
Test Point
for a complete table of trip points.
R e visio n 8
VOH
Min.
DP(R)
DP(F)
V
R = 1 k
mA mA
I
OL
V
I
10 pF for t
R to VCCI for t
R to GND for t
OH
REF
5 pF for t
(typ.) (V)
Max.
I
mA
OSH
HZ
ZH
3
/ t
/ t
HZ
LZ
LZ
ZHS
/ t
/ t
Max.
ZH
/ t
mA
ZL
I
OSL
ZL
C
/ t
/ t
3
LOAD
ZLS
/ t
ZHS
10
ZLS
µA
(pF)
I
10
IL
1
4
µA
I
10
IH
2
4

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