AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 2

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AGLE600V2-FGG484

Manufacturer Part Number
AGLE600V2-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AGLE600V2-FGG484

Processor Series
AGLE600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
270
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGLE600V2-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AGLE600V2-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
I/Os Per Package
IGLOOe FPGAs Package Sizes Dimensions
IGLOOe Device Status
IGLOOe Devices
ARM-Enabled IGLOOe Devices
Package
FG256
FG484
FG896
Notes:
1. When considering migrating your design to a lower- or higher-density device, refer to the
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For AGLE3000 devices, the usage of certain I/O standards is limited as follows:
4. FG256 and FG484 are footprint-compatible packages.
5. When using voltage-referenced I/O standards, one I/O pin should be assigned as a voltage-referenced pin (V
6. When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular I/O, the number of single-ended
7. "G" indicates RoHS-compliant packages. Refer to
Package
Length × Width (mm × mm)
Nominal Area (mm2)
Pitch (mm)
Height (mm)
IGLOOe Devices
AGLE600
AGLE3000
IGLOOe Low Power Flash FPGAs
I I
ensure compliance with design and board migration requirements.
– SSTL3(I) and (II): up to 40 I/Os per north or south bank
– LVPECL / GTL+ 3.3 V / GTL 3.3 V: up to 48 I/Os per north or south bank
– SSTL2(I) and (II) / GTL+ 2.5 V/ GTL 2.5 V: up to 72 I/Os per north or south bank
(group of I/Os).
user I/Os available is reduced by one.
part number.
1
Production
Production
Single-Ended
Status
I/O
270
165
1
"IGLOOe Ordering Information" on page III
AGLE600
17 × 17
FG256
289
1.6
1
R ev i si o n 8
Differential
I/O Pairs
M1 IGLOOe Devices
135
79
M1AGLE3000
I/O Types
23 × 23
FG484
2.23
529
1
Single-Ended
IGLOOe FPGA Fabric User’s Guide
I/O
341
620
1
for the location of the "G" in the
M1AGLE3000
AGLE3000
Production
Status
REF
31 × 31
FG896
Differential
2.23
I/O Pairs
961
) per minibank
1
168
310
to

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