AGLE600V2-FGG484 Actel, AGLE600V2-FGG484 Datasheet - Page 23
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AGLE600V2-FGG484
Manufacturer Part Number
AGLE600V2-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet
1.AGLE600V2-FGG484.pdf
(158 pages)
Specifications of AGLE600V2-FGG484
Processor Series
AGLE600
Core
IP Core
Maximum Operating Frequency
526.32 MHz, 892.86 MHz
Number Of Programmable I/os
270
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGLE600V2-FGG484
Manufacturer:
Actel
Quantity:
135
Company:
Part Number:
AGLE600V2-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-12 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings
Single-Ended
3.3 V LVTTL/LVCMOS
3.3 V LVTTL/LVCMOS – Schmitt trigger
3.3 V LVCMOS Wide Range
3.3 V LVCMOS Wide Range – Schmitt trigger
2.5 V LVCMOS
2.5 V LVCMOS
1.8 V LVCMOS
1.8 V LVCMOS – Schmitt trigger
1.5 V LVCMOS (JESD8-11)
1.5 V LVCMOS (JESD8-11) – Schmitt trigger
1.2 V LVCMOS
1.2 V LVCMOS – Schmitt trigger
1.2 V LVCMOS Wide Range
1.2 V LVCMOS Wide Range – Schmitt trigger
3.3 V PCI
3.3 V PCI – Schmitt trigger
3.3 V PCI-X
3.3 V PCI-X – Schmitt trigger
Voltage-Referenced
3.3 V GTL
2.5 V GTL
3.3 V GTL+
2.5 V GTL+
HSTL (I)
HSTL (II)
SSTL2 (I)
SSTL2 (II)
SSTL3 (I)
SSTL3 (II)
Differential
LVDS
LVPECL
Notes:
1. P
2. P
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8b specification.
4. Applicable for IGLOOe V2 devices only.
DC6
AC9
is the total dynamic power measured on VCCI.
is the static power (where applicable) measured on VCCI.
Power per I/O Pin
4
3
4
4
3
4
R e v i s i o n 8
VCC
(V)
3.3
3.3
1.2
1.2
1.2
1.2
3.3
3.3
2.5
2.5
1.8
1.8
1.5
1.5
3.3
3.3
3.3
3.3
3.3
2.5
3.3
2.5
1.5
1.5
2.5
2.5
3.3
3.3
2.5
3.3
I
Static Power
P
DC6
0.17
1.38
1.38
3.21
3.21
2.90
2.13
2.81
2.57
0.17
2.26
5.71
–
–
–
–
(mW)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
IGLOOe Low Power Flash FPGAs
1
Dynamic Power
P
AC9
(µW/MHz)
16.34
24.49
16.34
24.49
17.76
19.10
17.76
19.10
4.71
6.13
1.66
1.78
1.01
0.97
0.60
0.53
0.60
0.53
7.14
3.54
2.91
2.61
0.79
.079
3.26
3.26
7.97
7.97
0.89
1.94
2
2 -9
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