XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 32

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SONET/SDH OVERHEAD INTERFACE - TRANSMIT DIRECTION
REV. 1.0.2
P
G3
E2
J4
IN
#
TxLDCCEnable
TxSDCCEnable
TxSDCC
S
IGNAL
N
AME
I/O
O
O
I
S
CMOS
CMOS
T
IGNAL
TTL
YPE
Transmit - Line DCC Input Port - Enable Output Pin:
This output pin, along with the TxTOHClk output pin and the TxLDCC
input pin are used to insert the value for the D4, D5, D6, D7, D8, D9,
D10, D11 and D12 bytes into the Transmit STS-12 TOH Processor
Block. The Transmit STS-12 TOH Processor block will accept this data
and will insert into the D4, D5, D6, D7, D8, D9, D10, D11 and D12 byte-
fields, within the outbound STS-12 data-stream.
The Line DCC HDLC Controller circuitry (which is connected to the
TxTOHClk, the TxLDCC and this output pin, is suppose to do the follow-
ing.
1. It should continuously monitor the state of this output pin.
2. Whenever this output pin pulses "High", then the Line DCC HDLC
Controller circuitry should place the next Line DCC bit (to be inserted
into the Transmit STS-12 TOH Processor block) onto the TxLDCC input
pin, upon the falling edge of TxTOHClk.
3. Any data that is placed on the TxLDCC input pin, will be sampled
upon the rising edge of TxOHClk.
Transmit - Section DCC Input Port - Enable Output Pin:
This output pin, along with the TxTOHClk output pin and the TxSDCC
input pin are used to insert the value for the D1, D2 and D3 bytes, into
the Transmit STS-12 TOH Processor Block. The Transmit STS-12 TOH
Processor block will accept this data and will insert into the D1, D2 and
D3 byte-fields, within the outbound STS-12 data-stream.
The Section DCC HDLC Controller circuitry (which is connected to the
TxTOHClk, the TxSDCC and this output pin, is suppose to do the follow-
ing.
1. It should continuously monitor the state of this output pin.
2. Whenever this output pin pulses "High", then the Section DCC HDLC
Controller circuitry should place the next Section DCC bit (to be inserted
into the Transmit STS-12 TOH Processor block) onto the TxSDCC input
pin, upon the falling edge of TxTOHClk.
3. Any data that is placed on the TxSDCC input pin, will be sampled
upon the rising edge of TxOHClk.
Transmit - Section DCC Input Port - Input Pin:
This input pin, along with the TxSDCCEnable and the TxTOHClk output
pins are used to insert a value for the D1, D2 and D3 bytes, into the
Transmit STS-12 TOH Processor Block. The Transmit STS-12 TOH
Processor block will accept this data and insert it into the D1, D2 and D3
byte fields, within the outbound STS-12 data-stream.
The Section DCC HDLC Circuitry that is interfaced to this input pin, the
TxSDCCEnable and the TxTOHClk pins is suppose to do the following.
1. It should continuously monitor the state of the TxSDCCEnable input
pin.
2. Whenever the TxSDCCEnable input pin pulses "High", then the Sec-
tion DCC HDLC Controller circuitry should place the next Section DCC
bit (to be inserted into the Transmit STS-12 TOH Processor block) onto
this input pin upon the falling edge of TxTOHClk.
3. Any data that is placed on the TxSDCC input pin, will be sampled
upon the rising edge of TxTOHClk.
N
OTE
: Tie this pin to GND if it is not going to be used.
26
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43