XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 137

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XRT94L43IB-F

Manufacturer Part Number
XRT94L43IB-F
Description
IC MAPPER SONET/SDH OC12 516BGA
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT94L43IB-F

Applications
Network Switches
Interface
Bus
Voltage - Supply
2.5V, 3.3V
Package / Case
516-BBGA
Mounting Type
Surface Mount
Product
Mapper
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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XRT94L43IB-F
Manufacturer:
Exar Corporation
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XRT94L43IB-F
Manufacturer:
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RECEIVE TRANSPORT OVERHEAD INTERFACE
XRT94L43
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
P
AA3
AE3
AB3
AE4
AC3
AD3
AA4
AA8
AB4
AE5
AC4
AB8
AD4
AF3
B8
B4
C6
A1
C5
B7
A8
A3
Y3
B9
B5
B6
C4
E7
A5
A9
D6
Y4
IN
#
RxPOH_0
RxPOH_1
RxPOH_2
RxPOH_3
RxPOH_4
RxPOH_5
RxPOH_6
RxPOH_7
RxPOH_8
RxPOH_9
RxPOH_10
RxPOH_11
RxPOH_12
RxPOH_13
RxPOH_14
RxPOH_15
RxPOHClk_0
RxPOHClk_1
RxPOHClk_2
RxPOHClk_3
RxPOHClk_4
RxPOHClk_5
RxPOHClk_6
RxPOHClk_7
RxPOHClk_8
RxPOHClk_9
RxPOHClk_10
RxPOHClk_11
RxPOHClk_12
RxPOHClk_13
RxPOHClk_14
RxPOHClk_15
S
IGNAL
N
AME
I/O
O
O
S
CMOS Receive SONET POH Processor Block - Path Overhead Output Port -
CMOS Receive SONET POH Processor Block - Path Overhead Output Port -
T
IGNAL
YPE
Output Pin:
These output pins, along with the RxPOHClk_n, RxPOHFrame_n and
RxPOHValid_n function as the Receive SONET POH Processor block -
POH Output port.
These pins serially output the POH data that have been received by each
of the Receive SONET POH Processor blocks (via the incoming STS-12
data-stream). Each bit, within the POH bytes is updated (via these output
pins) upon the falling edge of RxPOHClk_n. As a consequence, external
circuitry receiving this data, should sample this data upon the rising edge
of RxPOHClk_n.
Clock Output Signal:
These output pins, along with RxPOH_n, RxPOHFrame_n and
RxPOHValid_n function as the Receive SONET POH Processor block -
POH Output Port.
These output pins function as the Clock Output signals for the Receive
SONET POH Processor block - POH Output Port. The RxPOH_n,
RxPOHFrame_n and RxPOHValid_n output pins are updated upon the
falling edge of this clock signal. As a consequence, the external circuitry
should sample these signals upon the rising edge of this clock signal.
131
D
ESCRIPTION
REV. 1.0.2

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