XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 13

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L43
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
5.0 STS-3/STM-1 TELECOM BUS INTERFACE TIMING INFORMATION ............................................... 308
6.0 TRANSMIT TOH OVERHEAD INPUT PORT....................................................................................... 310
7.0 TRANSMIT POH OVERHEAD INPUT PORT....................................................................................... 311
8.0 TRANSMIT ORDERWIRE (E1, F1, E2) BYTE OVERHEAD INPUT PORT ......................................... 312
9.0 TRANSMIT SECTION DCC INSERTION INPUT PORT ...................................................................... 313
10.0 TRANSMIT LINE DCC INSERTION INPUT PORT ............................................................................ 314
11.0 RECEIVE TOH OVERHEAD OUTPUT PORT.................................................................................... 315
12.0 RECEIVE POH OVERHEAD OUTPUT PORT ................................................................................... 316
13.0 RECEIVE ORDERWIRE (E1, F1, E2) BYTES OVERHEAD OUTPUT PORT ................................... 317
14.0 RECEIVE SECTION DCC EXTRACTION OUTPUT PORT ............................................................... 318
15.0 RECEIVE LINE DCC EXTRACTION OUTPUT PORT ....................................................................... 319
ORDERING INFORMATION.......................................................................................... 321
PACKAGE DIMENSIONS.............................................................................................. 321
R
4.5 EGRESS TIMING FOR DS3/E3 APPLICATIONS ........................................................................................... 307
4.6 EGRESS TIMING FOR STS-1/STM-0 APPLICATIONS.................................................................................. 308
5.1 STS-3/STM-1 TELECOM BUS INTERFACE TIMING INFORMATION ........................................................... 308
5.2 THE RECEIVE STS-3/STM-1 TELECOM BUS INTERFACE TIMING ............................................................ 308
5.3 THE TRANSMIT STS-3/STM-1 TELECOM BUS INTERFACE TIMING.......................................................... 309
6.1 TRANSMIT TOH OVERHEAD INPUT PORT .................................................................................................. 310
7.1 TRANSMIT POH OVERHEAD INPUT PORT .................................................................................................. 311
8.1 TRANSMIT E1, F1, E2 (ORDER-WIRE) BYTE OVERHEAD INPUT PORT ................................................... 312
9.1 TRANSMIT SECTION DCC INSERTION INPUT PORT .................................................................................. 313
10.1 TRANSMIT LINE DCC INSERTION INPUT PORT........................................................................................ 314
11.1 RECEIVE TOH OVERHEAD OUTPUT PORT ............................................................................................... 315
12.1 RECEIVE POH OVERHEAD OUTPUT PORT ............................................................................................... 316
13.1 RECEIVE E1, F1, E2 (ORDER-WIRE) BYTE OVERHEAD OUTPUT PORT ................................................ 317
14.1 RECEIVE SECTION DCC OUTPUT PORT ................................................................................................... 318
15.1 RECEIVE LINE DCC OUTPUT PORT ........................................................................................................... 319
EVISION
T
T
T
F
T
F
T
F
T
F
T
F
T
F
T
F
T
F
T
F
T
F
T
F
T
F
T
ABLE
ABLE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
12: T
13: T
14: T
15: T
16: T
17: T
18: T
19: T
20: T
21: T
22: T
23: T
24: T
25: T
26: T
20. W
21. W
22. T
23. T
24. T
25. T
26. T
27. T
28. T
29. T
30. T
31. T
H
ISTORY
F
DS3/E3/STS_1_NEG_OUT
F
DS3/E3/STS_1_NEG_OUT
RAMER
RAMER
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
IMING
AVEFORMS OF THE
AVEFORMS OF THE SIGNALS THAT ARE INPUT VIA THE
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
NFORMATION FOR THE
.................................................................................................................................... 322
B
B
W
W
W
W
W
W
W
W
W
W
LOCK HAS BEEN CONFIGURED TO OUTPUT THE OUTBOUND
LOCK HAS BEEN CONFIGURED TO OUTPUT THE OUTBOUND
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
AVEFORM OF THE
S
IGNALS THAT ARE OUTPUT VIA THE
T
T
T
T
T
R
R
R
R
R
OUTPUT PINS
OUTPUT PINS
RANSMIT
RANSMIT
RANSMIT
RANSMIT
RANSMIT
ECEIVE
ECEIVE
ECEIVE
ECEIVE
ECEIVE
E
E
E
R
T
T
T
T
T
T
R
R
R
R
R
RANSMIT
RANSMIT
RANSMIT
RANSMIT
RANSMIT
RANSMIT
GRESS
GRESS
GRESS
ECEIVE
ECEIVE
ECEIVE
ECEIVE
ECEIVE
ECEIVE
TOH O
POH O
O
S
L
TOH O
POH O
O
S
L
INE
DS3/E3/STS-1 LIU I
DS3/E3/STS-1 LIU I
DS3/E3/STS-1 LIU I
ECTION
RDER
STS-3/STM-1 T
TOH O
POH O
O
S
L
INE
ECTION
RDER
STS-3/STM-1 T
TOH O
POH O
O
O
L
INE
ECTION
RDER
)
)
INE
RDER
RDER
DCC O
UPON THE RISING EDGE OF
UPON THE FALLING EDGE OF
DCC I
-W
DCC O
VERHEAD
VERHEAD
-W
DCC I
VERHEAD
VERHEAD
-W
DCC O
VERHEAD
VERHEAD
IRE
-W
-W
DCC O
VERHEAD
VERHEAD
DCC O
IRE
IRE
NSERTION
UTPUT
IRE
IRE
B
III
UTPUT
NSERTION
B
YTE
B
YTE
UTPUT
O
B
B
O
YTE
VERHEAD
ELECOM
T
I
I
YTE
YTE
UTPUT
UTPUT
NPUT
O
UTPUT
NPUT
O
ELECOM
P
RANSMIT
O
R
I
I
UTPUT
NPUT
O
UTPUT
ORT
NPUT
VERHEAD
P
ECEIVE
O
NTERFACE FOR
NTERFACE FOR
NTERFACE FOR
VERHEAD
O
O
I
ORT
VERHEAD
NPUT
P
P
VERHEAD
VERHEAD
P
I
ORT
.................................................................................. 320
NPUT
P
P
P
ORT
ORT
B
P
P
ORT
ORT
ORT
P
I
P
............................................................................... 320
B
ORT
US
ORT
NSERTION
DS3/E3
DS3/E3
STS-3/STM-1 T
STS-3/STM-1 T
ORT
............................................................................ 319
P
ORT
US
.......................................................................... 311
.......................................................................... 312
ORT
O
P
I
........................................................................ 316
........................................................................ 317
......................................................................... 319
DS3/E3/STS_1_CLOCK_OUT ....................... 307
NTERFACE
I
I
ORT
....................................................................... 311
....................................................................... 312
NPUT
UTPUT
O
DS3/E3/STS_1_CLOCK_OUT ..................... 307
NTERFACE
..................................................................... 316
..................................................................... 317
I
I
UTPUT
NPUT
NPUT
................................................................... 315
DATA
DATA
................................................................ 315
DS3/E3 A
DS3/E3 A
STS-1/STM-0 A
P
P
P
ORT
ORT
P
P
ORT
P
ORT
ORT
(
(
ORT
VIA THE
VIA THE
....................................................... 309
..................................................... 310
.................................................... 313
.................................................... 314
ELECOM
................................................... 318
ELECOM
................................................. 313
................................................. 314
PPLICATIONS AND WHEN THE
PPLICATIONS AND WHEN THE
................................................ 318
DS3/E3/STS_1_DATA_OUT
DS3/E3/STS_1_DATA_OUT
B
B
PPLICATIONS
US
US
I
I
NTERFACE
NTERFACE
.................. 308
.............. 310
............. 309
REV. 1.0.2
DS3/E3
DS3/E3
AND
AND