XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 141
XRT94L43IB-F
Manufacturer Part Number
XRT94L43IB-F
Description
IC MAPPER SONET/SDH OC12 516BGA
Manufacturer
Exar Corporation
Datasheet
1.XRT94L43IB.pdf
(328 pages)
Specifications of XRT94L43IB-F
Applications
Network Switches
Interface
Bus
Voltage - Supply
2.5V, 3.3V
Package / Case
516-BBGA
Mounting Type
Surface Mount
Product
Mapper
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L43IB-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XRT94L43IB-F
Manufacturer:
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Quantity:
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GENERAL PURPOSE INPUT/OUTPUT
XRT94L43
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
P
A19
IN
#
GPIO_0
ExtLOS_0
SSE_CLK
S
IGNAL
N
AME
I/O
I/O
S
CMOS
T
TTL/
IGNAL
YPE
General Purpose Input/Output Pin or External LOS Input Pin/Slow-
Speed Interface - Egress - Clock I/O:
The function of this input pin depends on whether or not Channel 0 of
the DS3/E3 Framer Block is enabled or whether or not the Slow-Speed
Interface is enabled.
GPIO_0 (DS3/E3 Framer Block - Channel 0 is disabled).
If the DS3/E3 Framer Block is disabled, then this pin will function as a
General Purpose Input/Output pin.
This input pin can be configured to function as either an input or output
pin by writing the appropriate value into Bit 0 (GPIO_DIR_0), within the
Operation General Purpose Input/Output Direction Register - 0 (Indirect
Address = 0x00, 0x4B), (Direct Address = 0x014B).
When configured as an input pin, the state of this pin can be monitored
by reading the state of Bit 0 (GPIO_0) within the Operation General Pur-
pose Input/Output Register - Byte 0 (Indirect Address = 0x00, 047),
(Direct Address = 0x0147).
When configured as an output pin, the state of this pin can be controlled
by writing the appropriate value into Bit 0 (GPIO_0) within the Operation
General Purpose Input/Output Register - Byte 0 (Indirect Address =
0x00, 0x47), (Direct Address = 0x047).
ExtLOS_0 (DS3/E3 Framer Block - Channel 0 is enabled).
If the DS3/E3 Framer Block is enabled, then this pin will function as the
External LOS Input pin for Channel 0. This input pin is intended to be
connected to a LOS output pin of a DS3/E3 LIU IC.
If this input pin is pulled "High", then the corresponding DS3/E3 Framer
block will automatically declare an LOS condition.
SSE_CLK (Slow-Speed Interface - Egress Port is enabled):
If the Slow-Speed Interface - Egress (SSE) Port is enabled, then this pin
will function as either the SSE_CLK output pin or the SSE_CLK input
pin.
If the user configures the SSE port to operate in the "Insert" Mode, then
the SSE port will be configured to replace any "user-selected" Egress
DS3/E3 or STS-1 data-stream (within the XRT94L43) with the data that
is applied to the SSE_POS and SSE_NEG input pins. More specifically,
in the Insert Mode, this pin will function as the SSE_CLK input pin. In
this case, the SSE port will sample and latch the contents of the
SSE_POS and SSE_NEG input pins upon the falling edge of this input
clock signal.
If the user configures the SSE port to operate in the "Extract" Mode, then
the SSE port will output any "user-selected" Egress DS3/E3 or STS-1
signal (within the XRT94L43) via this output port. More specifically, in
the "Extract Mode", this pin will function as the SSE_CLK output pin. In
this case, the SSE port will output the data (via the SSE_POS and
SSE_NEG output pins) upon the rising edge of this output clock signal.
135
D
ESCRIPTION
REV. 1.0.2
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