XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 16

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MICROPROCESSOR INTERFACE
REV. 1.0.2
P
R23
V22
T23
IN
#
RD/
DS/
WE
PALE/PAS_L
PCS_L
S
IGNAL
N
AME
I/O
I
I
I
S
T
IGNAL
TTL
TTL
TTL
YPE
READ Strob/Data Strobe:
The function of this input pin depends upon which mode the Microproces-
sor Interface has been configured to operate in.
Intel-Asynchronous Mode - RD - READ Strobe Input:
If the Microprocessor Interface is operating in the Intel-Asynchronous
Mode, then this input pin will function as the RD (Active Low Read Strobe)
input signal from the Microprocessor. Once this active-low signal is
asserted, then the XRT94L43 will place the contents of the addressed reg-
ister (or buffer location) on the Microprocessor Interface Bi-directional data
bus (D[7:0]). When this signal is negated, then the Data Bus will be tri-
stated.
Motorola-Asynchronous (68K) Mode - DS - Data Strobe:
If the Microprocessor Interface is operating in the Motorola-Asynchronous
Mode, then this input pin will function as the DS (Data Strobe) input signal.
Power PC 403 Mode - WE - Write Enable Input:
If the Microprocessor Interface is operating in the Power PC 403 Mode,
then this input pin will function as the WE (Write Enable) input pin.
(along with CS and WR/R/W) also being asserted (at a logic low level) upon
the rising edge of µPCLK, then the Microprocessor Interface will (upon the
very same rising edge of µPCLK) latch the contents on the Bi-Directional
Data Bus (D[7:0]) into the "target" on-chip register or buffer location within
the XRT94L43.
Address Latch Enable/Address Strobe:
This input pin is used to latch the address (present at the Microprocessor
Interface Address Bus pins (A[6:0]) into the Mapper/Framer Microprocessor
Interface block and to indicate the start of a READ or WRITE cycle. This
input pin is active-High, in the Intel Mode and active-Low in the Motorola
Mode.
Chip Select Input:
The user must assert this active low signal in order to select the Micropro-
cessor Interface for READ and WRITE operations between the Micropro-
cessor and the XRT94L43 on-chip registers and buffer locations.
Anytime the Microprocessor Interface samples this active-low input signal
10
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43