XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 188

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.2
STS-3/STM-1 TELECOM BUS INTERFACE - TRANSMIT DIRECTION
P
D25
IN
#
STS3TxA_ALARM_1
TxDS3FP_1
TxSTS1PL_1
S
IGNAL
N
AME
I/O
I/O
S
CMOS
T
TTL/
IGNAL
YPE
Transmit STS-3/STM-1 Telecom Bus - Alarm Indicator Input -
Channel 1; DS3/E3 Frame Generator Framing Pulse Input/Out-
put Pin - Channel 1:
The function of this pin depends upon whether or not theSTS-3/STM-
1 Telecom Bus Interface for Channel 1 has been enabled.
If STS-3/STM-1 Telecom Bus (Channel 1) has been enabled -
STS-3/STM-1 Transmit Telecom Bus - Alarm Indicator Input:
carrying the AIS-P indicator) being applied to the STS3TxA_D_1[7:0]
input data bus.
N
If STS-3/STM-1 Telecom Bus (Channel 1) is disabled -
TxDS3FP_1 (Transmit DS3 Frame Pulse Input/Output - Channel
1):
If the STS-3/STM-1 Telecom Bus (Channel 1) is disabled and if the
DS3/E3 Framer block is enabled then this pin will function as either a
Transmit Framing Reference input pin or as a Transmit Framing Ref-
erence output pin.
If the Frame Generator (within the DS3/E3 Framer block) is con-
figured to operate in the Loop-Timing or in the Local-Timing/
Asynchronous Framing Mode:
This pin will function as a Framing Reference Output pin. The Frame
Generator block (associated with Channel 1) will pulse this output pin
"High" for one DS3/E3 bit-period, one period prior to the first bit of a
given DS3 or E3 frame being applied to the DS3/E3/
STS1_DATA_IN_1 input pin.
If the Frame Generator (within the DS3/E3 Framer block) is con-
figured to operate in the Local-Timing/TxDS3FP Mode:
This pin will function as a Framing Reference Input pin. In this mode,
the user is expected to pulse this input pin "High" for one DS3 or E3
bit-period, coincident with the first bit of a given DS3 or E3 frame,
being placed on the DS3/E3/STS1_DATA_IN_1 input pin. The Frame
Generator block (associated with Channel 1) will synchronize its gen-
eration of DS3 or E3 frames to these framing pulses applied to this
input pin.
N
This input pin pulses "High" coincident to any STS-1 signal (which is
OTE
OTE
: If the STS3TxA_ALARM_1 input signal pulses "High" for any
: This pin is inactive if the Frame Generator block, associated
182
given STS-1 signal (within the incoming STS-3), then the
XRT94L43 will automatically declare an AIS-P for that STS-1
channel.
with Channel 1 is by-passed.
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43