XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 179
XRT94L43IB-F
Manufacturer Part Number
XRT94L43IB-F
Description
IC MAPPER SONET/SDH OC12 516BGA
Manufacturer
Exar Corporation
Datasheet
1.XRT94L43IB.pdf
(328 pages)
Specifications of XRT94L43IB-F
Applications
Network Switches
Interface
Bus
Voltage - Supply
2.5V, 3.3V
Package / Case
516-BBGA
Mounting Type
Surface Mount
Product
Mapper
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Quantity
Price
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Part Number:
XRT94L43IB-F
Manufacturer:
Exar Corporation
Quantity:
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Part Number:
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Manufacturer:
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XRT94L43
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
STS-3/STM-1 TELECOM BUS INTERFACE - TRANSMIT DIRECTION
P
B24
IN
#
STS3TxA_C1J1_0
TxDS3FP_8
TxSTS1PL_8
TxSBFrame_0
S
IGNAL
N
AME
I/O
I/O
S
CMOS
T
TTL/
IGNAL
YPE
STS-3/STM-1 Transmit Telecom Bus C1/J1 Byte Phase Indicator
Input Signal (Channel 0); DS3/E3 Frame Generator Framing
Pulse Input/Output Pin - Channel 8:
The function of this pin depends upon whether or not theSTS-3/STM-
1 Telecom Bus Interface for Channel 0 has been enabled.
If STS-3/STM-1 Telecom Bus (Channel 0) has been enabled -
STS-3/STM-1 Transmit Telecom Bus C1/J1 Byte Phase Indicator
Input Signal (Channel 0):
This input pin should be pulsed "High" during both of the following
conditions.
1. Whenever the C1 byte is being input to the STS-3/STM-1 Transmit
Telecom Bus (TXA_D_0[7:0]) input pins.
2. Whenever the J1 byte is being input to the STS-3/STM-1 Transmit
Telecom Bus (TXA_D_0[7:0]) input pins.
If STS-3/STM-1 Telecom Bus (Channel 0) is disabled -
TxDS3FP_8 (Transmit DS3 Frame Pulse Input/Output - Channel
8):
If the STS-3/STM-1 Telecom Bus (Channel 0) is disabled and if the
DS3/E3 Framer block is enabled then this pin will function as either a
Transmit Framing Reference input pin or as a Transmit Framing Ref-
erence output pin.
If the Frame Generator (within the DS3/E3 Framer block) is con-
figured to operate in the Loop-Timing or in the Local-Timing/
Asynchronous Framing Mode:
This pin will function as a Framing Reference Output pin. The Frame
Generator block (associated with Channel 8) will pulse this output pin
"High" for one DS3/E3 bit-period, one period prior to the first bit of a
given DS3 or E3 frame being applied to the DS3/E3/
STS1_DATA_IN_8 input pin.
If the Frame Generator (within the DS3/E3 Framer block) is con-
figured to operate in the Local-Timing/TxDS3FP Mode:
This pin will function as a Framing Reference Input pin. In this mode,
the user is expected to pulse this input pin "High" for one DS3 or E3
bit-period, coincident with the first bit of a given DS3 or E3 frame,
being placed on the DS3/E3/STS1_DATA_IN_8 input pin. The Frame
Generator block (associated with Channel 8) will synchronize its gen-
eration of DS3 or E3 frames to these framing pulses applied to this
input pin.
N
OTE
: This pin is inactive if the Frame Generator block, associated
173
with Channel 8 is by-passed.
D
ESCRIPTION
REV. 1.0.2
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