SI4031-B1-FM Silicon Laboratories Inc, SI4031-B1-FM Datasheet - Page 50

• Manufacturer Part Number: SI4031-B1-FM
• Description: IC TX 240-930MHZ -8-13DB 20VQFN
• Manufacturer: Silicon Laboratories Inc
• Type: ISM Transmitterr

Specifications of SI4031-B1-FM

• Package / Case: 20-VQFN
• Frequency: 240MHz ~ 930MHz
• Applications: General Purpose
• Modulation Or Protocol: FSK, GFSK, OOK
• Data Rate - Maximum: 256 kbps
• Power - Output: 13dBm
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Operating Frequency: 240 MHz to 930 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V to 3.6 V
• Supply Current: 30 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1C-2F
Add
0C
0D
3C
3D
6D
7C
7D
01
02
03
04
05
06
07
08
09
0A
0B
0E
0F
10
12
13
14
15
16
17
18
19
1A
1B
30
31
32
33
34
36
37
38
39
3A
3B
3E
4F
60
62
6E
6F
70
71
72
73
74
75
76
77
79
7A
7E
7F
11
Si4030/31/32-B1
11. Register Table and Descriptions
Note: Detailed register descriptions are available in “AN466: Si4030/31/32 Register Descriptions.”
50
R/W
R/W
R/W
R/W Operating & Function Control 1
R/W Operating & Function Control 2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W Low Battery Detector Threshold
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
Frequency Hopping Step Size
Crystal Oscillator/Control Test
Nominal Carrier Frequency 1
Nominal Carrier Frequency 0
Frequency Hopping Channel
Microcontroller Output Clock
ADC Sensor Amplifier Offset
Temperature Sensor Control
Modulation Mode Control 1
Modulation Mode Control 2
Temperature Value Offset
Wake-Up Timer Period 1
Wake-Up Timer Period 2
Wake-Up Timer Period 3
Wake-Up Timer Value 1
Wake-Up Timer Value 2
Transmit Packet Length
Frequency Band Select
Crystal Oscillator Load
I/O Port Configuration
Battery Voltage Level
GPIO0 Configuration
GPIO1 Configuration
GPIO2 Configuration
Data Access Control
Frequency Deviation
Frequency Offset 1
Frequency Offset 2
ADC Configuration
Transmit Header 3
Transmit Header 2
Transmit Header 1
Transmit Header 0
TX FIFO Control 1
TX FIFO Control 2
Interrupt Enable 1
Interrupt Enable 2
Interrupt Status 1
Interrupt Status 2
Header Control 2
Preamble Length
Function/Desc
TX Data Rate 1
TX Data Rate 0
Device Version
EzMAC status
ADC8 Control
Device Status
Sync Word 3
Sync Word 2
Sync Word 1
Sync Word 0
FIFO Access
Capacitance
ADC Value
TX Power
Select
adcstart/adc-
gpio0drv[1]
gpio1drv[1]
gpio2drv[1]
tsrange[1]
prealen[7]
papeakval
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
sync[31]
sync[23]
sync[15]
tvoffs[7]
wtm[15]
txhd[31]
txhd[23]
txhd[15]
pklen[7]
txdr[15]
xtalshft
wtv[15]
sync[7]
pwst[2]
wtm[7]
txhd[7]
fhch[7]
fifod[7]
enfferr
txdr[7]
trclk[1]
swres
adc[7]
wtv[7]
fc[15]
fhs[7]
done
ffovfl
ifferr
fd[7]
fo[7]
fc[7]
D7
0
0
0
Table 15. Register Descriptions
gpio1drv[0]
gpio2drv[0]
gpio0drv[0]
tsrange[0]
prealen[6]
Reserved
entxffafull
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
papeaken
Reserved
Reserved
Reserved
Reserved
adcsel[2]
extitst[2]
sync[30]
sync[22]
sync[14]
wtm[14]
hdlen[2]
txhd[30]
txhd[22]
txhd[14]
pklen[6]
itxffafull
tvoffs[6]
txdr[14]
wtv[14]
sync[6]
pwst[1]
wtm[6]
txhd[6]
fhch[6]
fifod[6]
txdr[6]
trclk[0]
adc[6]
wtv[6]
lsbfrst
enlbd
fc[14]
fhs[6]
xlc[6]
sbsel
ffunfl
fd[6]
fo[6]
fc[6]
D6
0
0
papeaklvl[1]
Rev 1.1
txdtrtscale
entxffaem
prealen[5]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
txaethr[5]
adcsel[1]
dtmod[1]
txafthr[5]
extitst[1]
crcdonly
sync[29]
sync[21]
sync[13]
itxffaem
entsoffs
tvoffs[5]
wtm[13]
hdlen[1]
txhd[29]
txhd[21]
txhd[13]
pklen[5]
adc8[5]
txdr[13]
wtv[13]
sync[5]
pwst[0]
wtm[5]
txhd[5]
fhch[5]
fifod[5]
adc[5]
txdr[5]
clkt[1]
wtv[5]
xlc[5]
hbsel
fc[13]
fhs[5]
pup0
pup1
pup2
enwt
fd[5]
fo[5]
fc[5]
Reserved
Reserved
Reserved
Reserved
Reserved
D5
0
0
papeaklvl[0]
enphpwdn
prealen[4]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
txaethr[4]
adcsel[0]
dtmod[0]
txafthr[4]
extitst[0]
sync[28]
sync[20]
sync[12]
gpio0[4]
gpio1[4]
gpio2[4]
entstrim
tvoffs[4]
wtm[12]
hdlen[0]
txhd[28]
txhd[20]
txhd[12]
pklen[4]
x32ksel
adc8[4]
txdr[12]
wtv[12]
sync[4]
wtm[4]
vbat[4]
txhd[4]
clkhyst
fhch[4]
fifod[4]
adc[4]
txdr[4]
clkt[0]
wtv[4]
lbdt[4]
wtr[4]
fc[12]
fhs[4]
xlc[4]
vc[4]
fd[4]
fo[4]
fb[4]
fc[4]
D4
Data
prealen[3]
adcoffs[3]
Reserved
Reserved
txaethr[3]
reserved
adcref[1]
enbias2x
sync[27]
sync[19]
manppol
txafthr[3]
gpio0[3]
gpio1[3]
gpio2[3]
tstrim[3]
sync[11]
txhd[27]
txhd[19]
tvoffs[3]
wtm[11]
enpactx
fixpklen
txhd[11]
pklen[3]
sync[3]
adc8[3]
Ina_sw
txdr[11]
wtv[11]
vbat[3]
txhd[3]
fhch[3]
fifod[3]
wtm[3]
enwut
autotx
adc[3]
wtv[3]
lbdt[3]
txdr[3]
enext
fhs[3]
xlc[3]
wtr[3]
eninv
fc[11]
vc[3]
enlfc
itsdo
txon
fd[3]
fo[3]
fb[3]
fc[3]
iwut
iext
D3
synclen[1]
prealen[2]
enmaninv
Reserved
adcoffs[2]
Reserved
Reserved
txaethr[2]
enpksent
enamp2x
reserved
adcref[0]
txafthr[2]
sync[26]
sync[18]
sync[10]
txpow[2]
gpio0[2]
gpio1[2]
gpio2[2]
tstrim[2]
tvoffs[2]
wtm[10]
txhd[26]
txhd[18]
txhd[10]
pklen[2]
adc8[2]
txdr[10]
ipksent
mclk[2]
wtv[10]
sync[2]
wtm[2]
vbat[2]
txhd[2]
fhch[2]
fifod[2]
enldm
adc[2]
lbdt[2]
txdr[2]
wtv[2]
enlbd
xlc[2]
wtr[2]
encrc
fc[10]
fhs[2]
vc[2]
dio2
fd[8]
fd[2]
fo[2]
fb[2]
fc[2]
ilbd
D2
adcgain[1]
synclen[0]
prealen[1]
Reserved
Reserved
enchiprdy
Reserved
adcoffs[1]
modtyp[1]
enmanch
txaethr[1]
sync[25]
sync[17]
txpow[1]
txafthr[1]
gpio0[1]
gpio1[1]
gpio2[1]
tstrim[1]
txhd[25]
txhd[17]
ichiprdy
tvoffs[1]
pklen[1]
mclk[1]
sync[9]
sync[1]
adc8[1]
vbat[1]
txhd[9]
txhd[1]
fhch[1]
fifod[1]
wtm[9]
wtm[1]
cps[1]
adc[1]
wtv[9]
wtv[1]
lbdt[1]
bufovr
txdr[9]
txdr[1]
wtr[1]
crc[1]
fhs[1]
xlc[1]
vc[1]
pllon
dio1
fd[1]
fo[1]
fo[9]
fb[1]
fc[1]
pktx
fc[9]
D1
adcgain[0]
prealen[0]
Reserved
Reserved
adcoffs[0]
prealen[8]
modtyp[0]
txaethr[0]
txafthr[0]
gpio0[0]
gpio1[0]
gpio2[0]
sync[24]
sync[16]
txhd[24]
txhd[16]
txpow[0]
tstrim[0]
tvoffs[0]
pklen[0]
enwhite
adc8[0]
mclk[0]
sync[8]
sync[0]
wtm[8]
wtm[0]
vbat[0]
pksent
txhd[8]
txhd[0]
fhch[0]
fifod[0]
cps[0]
adc[0]
lbdt[0]
txdr[8]
txdr[0]
enpor
wtv[8]
wtv[0]
enbuf
ffclrtx
xlc[0]
wtr[0]
crc[0]
fhs[0]
vc[0]
fd[0]
fo[0]
fo[8]
fb[0]
xton
dio0
fc[8]
fc[0]
ipor
D0
Default
POR
8Dh
2Dh
D4h
3Dh
0Ch
BBh
06h
00h
03h
01h
00h
7Fh
06h
00h
00h
00h
00h
00h
00h
20h
00h
03h
00h
01h
14h
22h
08h
00h
00h
00h
00h
00h
00h
00h
10h
24h
18h
0Ah
20h
00h
00h
75h
80h
00h
00h
04h
00h
37h
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