SI4031-B1-FM Silicon Laboratories Inc, SI4031-B1-FM Datasheet

IC TX 240-930MHZ -8-13DB 20VQFN

SI4031-B1-FM

Manufacturer Part Number
SI4031-B1-FM
Description
IC TX 240-930MHZ -8-13DB 20VQFN
Manufacturer
Silicon Laboratories Inc
Type
ISM Transmitterr
Datasheet

Specifications of SI4031-B1-FM

Package / Case
20-VQFN
Frequency
240MHz ~ 930MHz
Applications
General Purpose
Modulation Or Protocol
FSK, GFSK, OOK
Data Rate - Maximum
256 kbps
Power - Output
13dBm
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Operating Frequency
240 MHz to 930 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V to 3.6 V
Supply Current
30 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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SI4031-B1-FMR
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Si4030/31/32 ISM T
Features
Applications
Description
Silicon Laboratories’ Si4030/31/32 devices are highly integrated, single-chip
wireless ISM transmitters. The high-performance EZRadioPRO
complete line of transmitters, receivers, and transceivers allowing the RF system
designer to choose the optimal wireless part for their application.
The Si4030/31/32 offers advanced radio features including continuous frequency
coverage from 240–960 MHz with adjustable power output levels of –8 to
+13 dBm on the Si4030/31 and +1 to +20 dBm on the Si4032. Power adjustments
are made in 3 dB steps. The Si4030/31/32’s high level of integration offers
reduced BOM cost while simplifying the overall system design. The Si4032’s
Industry leading +20 dBm output power ensures extended range and improved
link performance.
Additional system features such as an automatic wake-up timer, low battery
detector, 64 byte TX FIFO, and automatic packet handling reduce overall current
consumption and allow the use of lower-cost system MCUs. An integrated
temperature sensor, general purpose ADC, power-on-reset (POR), and GPIOs
further reduce overall system cost and size.
The direct digital transmit modulation and automatic PA power ramping ensure
precise transmit modulation and reduced spectral spreading ensuring compliance
with global regulations including FCC, ETSI, and ARIB regulations.
An easy-to-use calculator is provided to quickly configure the radio settings,
simplifying customer's system design and reducing time to market.
Rev 1.1 1/10
Frequency range


Output Power Range


Low Power Consumption


Data Rate = 0.123 to 256 kbps
FSK, GFSK, and OOK modulation
Power Supply = 1.8 to 3.6 V
Remote control
Home security & alarm
Telemetry
Personal data logging
Toy control
Wireless PC peripherals
240–930 MHz (Si4031/32)
900–960 MHz (Si4030)
+1 to +20 dBm (Si4032)
–8 to +13 dBm (Si4030/31)
Si4032
Si4030/31
85 mA @ +20 dBm
30 mA @ +13 dBm
Copyright © 2010 by Silicon Laboratories
Remote meter reading
Remote keyless entry
Home automation
Industrial control
Sensor networks
Health monitors
Ultra low power shutdown mode
Wake-up timer
Integrated 32 kHz RC or 32 kHz
XTAL
Integrated voltage regulators
Configurable packet handler
TX 64 byte FIFO
Low battery detector
Temperature sensor and 8-bit ADC
–40 to +85 °C temperature range
Integrated voltage regulators
Frequency hopping capability
On-chip crystal tuning
20-Pin QFN package
Low BOM
Power-on-reset (POR)
RANSMITTER
®
family includes a
S i 4 0 3 0 / 3 1 / 3 2 - B 1
Patents pending
VDD_RF
NC
NC
NC
TX
Ordering Information:
2
3
4
5
Pin Assignments
1
6
Si4030/31/32
See page 53.
20
7
19
GND
8
PAD
18
9
17
10
Si4030/31/32
16
11
15 SCLK
14
13
12
SDI
SDO
VDD_DIG
NC

Related parts for SI4031-B1-FM

SI4031-B1-FM Summary of contents

Page 1

... Si4030/31/32 ISM T Features Frequency range  240–930 MHz (Si4031/32)  900–960 MHz (Si4030)  Output Power Range  +20 dBm (Si4032)  –8 to +13 dBm (Si4030/31)  Low Power Consumption  Si4032  +20 dBm Si4030/31  ...

Page 2

Si4030/31/32-B1 Functional Block Diagram 2 Rev 1.1 ...

Page 3

T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

Si4030/31/32-B1 14. Package Markings (Top Marks ...

Page 5

... Figure 15. Manchester Coding Example ...................................................................................37 Figure 16. POR Glitch Parameters............................................................................................ 39 Figure 17. General Purpose ADC Architecture ......................................................................... 41 Figure 18. Temperature Ranges using ADC8 ........................................................................... 43 Figure 19. WUT Interrupt and WUT Operation.......................................................................... 46 Figure 20. Si4031 Reference Design Schematic ...................................................................... 48 Figure 21. 20-Pin Quad Flat No-Lead (QFN) ............................................................................54 Figure 22. PCB Land Pattern .................................................................................................... 55 Si4030/31/32-B1 Rev 1.1 ...

Page 6

ABLES 1 Table 1. DC Characteristics ......................................................................................................7 Table 2. Synthesizer AC Electrical Characteristics Table 3. Transmitter AC Electrical Characteristics Table 4. Auxiliary Block Specifications Table 5. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and ...

Page 7

Electrical Specifications 1 Table 1. DC Characteristics Parameter Symbol Supply Voltage Range V DD Power Saving Modes I Shutdown I Low Power Digital Regulator ON (Register values retained) Standby I Sleep (Register values retained) and Main Digital Regulator OFF ...

Page 8

... Si4030/31/32-B1 Table 2. Synthesizer AC Electrical Characteristics Parameter Symbol Synthesizer Frequency F SYN Range—Si4031/32 Synthesizer Frequency F SYN Range—Si4030 Synthesizer Frequency F RES-LB 2 Resolution F RES-HB Reference Frequency f REF_LV 2 Input Level 2 Synthesizer Settling Time t LOCK 2 F Residual FM RMS 2 Phase Noise L(f M Notes: 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the " ...

Page 9

... Table 3. Transmitter AC Electrical Characteristics Parameter Symbol TX Frequency F TX Range—Si4031/32 TX Frequency F TX Range—Si4030 2 FSK Data Rate DR FSK 2 OOK Data Rate DR OOK Modulation Deviation Δf1 Δf2 Modulation Deviation Δf RES 2 Resolution Output Power Range —Si4032 Output Power Range—Si4030/31 2  Output Steps ...

Page 10

Si4030/31/32-B1 Table 4. Auxiliary Block Specifications Parameter Symbol Temperature Sensor TS 2 Accuracy Temperature Sensor TS 2 Sensitivity Low Battery Detector LBD 2 Resolution Low Battery Detector LBD 2 Conversion Time Microcontroller Clock F MC Output Frequency General Purpose ADC ...

Page 11

Table 5. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ) Parameter Symbol Rise Time T Fall Time T Input Capacitance Logic High Level Input Voltage Logic Low Level Input Voltage Input Current Logic High Level Output Voltage Logic Low ...

Page 12

Si4030/31/32-B1 Table 7. Absolute Maximum Ratings V to GND DD Instantaneous V to GND on TX Output Pin RF-peak Sustained V to GND on TX Output Pin RF-peak Voltage on Digital Control Inputs Voltage on Analog Inputs Operating Ambient Temperature ...

Page 13

Definition of Test Conditions Production Test Conditions +25 °C  +3.3 VDC  output power measured at 915 MHz  External reference signal (XOUT) = 1.0 V  Production test schematic (unless ...

Page 14

Si4030/31/32-B1 2. Functional Description The Si4030/31/32 are ISM wireless transmitters with continuous frequency tuning over their specified bands which encompasses 240–960 MHz. The wide operating voltage range of 1.8–3.6 V and low current consumption makes the Si4030/31/32 an ideal solution ...

Page 15

Controller Interface 3.1. Serial Peripheral Interface (SPI) The Si4030/31/32 communicates with the host MCU over a standard 3-wire SPI interface: SCLK, SDI, and nSEL. The host MCU can read data from the device on the SDO output pin. A ...

Page 16

Si4030/31/32-B1 First Bit RW SDI SCLK SDO nSEL The SPI interface contains a burst read/write mode which allows for reading/writing sequential registers without having to re-send the SPI address. When the nSEL bit is held low while ...

Page 17

Operating Mode Control There are three primary states in the Si4030/31/32 radio state machine: SHUTDOWN, IDLE, and TX (see Figure 5). The SHUTDOWN state completely shuts down the radio to minimize current consumption. There are five different configurations/options for ...

Page 18

Si4030/31/32-B1 3.2.1. SHUTDOWN State The SHUTDOWN state is the lowest current consumption state of the device with nominally less than current consumption. The SHUTDOWN state may be entered by driving the SDN pin (Pin 20) high. The ...

Page 19

TX State The TX state may be entered from any of the IDLE modes when the txon bit is set "Register 07h. Operating Mode and Function Control 1". A built-in sequencer takes care of all the ...

Page 20

Si4030/31/32-B1 3.3. Interrupts The Si4030/31/32 is capable of generating an interrupt signal when certain events occur. The chip notifies the microcontroller that an interrupt event has occurred by setting the nIRQ output pin LOW = 0. This interrupt signal will ...

Page 21

System Timing The system timing for TX mode is shown in Figure 6. The figures demonstrate transitioning from STANDBY mode to TX mode through the built-in sequencer of required steps. The user only needs to program the desired mode, ...

Page 22

Si4030/31/32-B1 3.5. Frequency Control For calculating the necessary frequency register settings it is recommended that customers use Silicon Labs’ Wireless Design Suite (WDS) or the EZRadioPRO Register Calculator worksheet (in Microsoft Excel) available on the product website. These methods offer ...

Page 23

Table 11. Frequency Band Selection fb[4:0] Value 240–249.9 MHz 1 25 250–259.9 MHz 2 26 260–269.9 MHz 3 27 270–279.9 MHz 4 28 280–289.9 MHz 5 29 290–299.9 MHz 6 30 300–309.9 MHz 7 31 310–319.9 MHz ...

Page 24

Si4030/31/32-B1 3.5.2. Easy Frequency Programming for FHSS While Registers 73h–77h may be used to program the carrier frequency of the Si4030/31/32 often easier to think in terms of “channels” or “channel numbers” rather than an absolute frequency value ...

Page 25

The previous equation should be used to calculate the desired frequency deviation. If desired, frequency modulation may also be disabled in order to obtain an unmodulated carrier signal at the channel center frequency; see "4.1. Modulation Type" on page 27 ...

Page 26

Si4030/31/32-B1 3.5.5. Frequency Offset Adjustment A frequency offset can be adjusted manually by fo[9:0] in registers 73h and 74h. The frequency offset adjustment is implemented by shifting the Synthesizer Local Oscillator frequency. This register is a signed register so in ...

Page 27

Modulation Options 4.1. Modulation Type The Si4030/31/32 supports three different modulation options: Gaussian Frequency Shift Keying (GFSK), Frequency Shift Keying (FSK), and On-Off Keying (OOK). GFSK is the recommended modulation type as it provides the best performance and cleanest ...

Page 28

Si4030/31/32-B1 4.2. Modulation Data Source The Si4030/31/32 may be configured to obtain its modulation data from one of three different sources: FIFO mode, Direct Mode, and from a PN9 mode. In Direct Mode, the TX modulation data may be obtained ...

Page 29

Direct Mode For legacy systems that perform packet handling within an MCU or other baseband chip, it may not be desirable to use the FIFO. For this scenario, a Direct Mode is provided which bypasses the FIFOs entirely. In ...

Page 30

Si4030/31/32-B1 4.2.2.3. Direct Mode using SPI or nIRQ Pins In certain applications it may be desirable to minimize the connections to the microcontroller or to preserve the GPIOs for other uses. For these cases it is possible to use the ...

Page 31

... An integrated Sigma Delta (ΣΔ) Fractional-N PLL synthesizer capable of operating from 240–960 MHz is provided on-chip. The Si4031/32 and Si4030 cover different frequencies. This section discusses the frequency range covered by all EZRadioPRO devices. Using a ΣΔ synthesizer has many advantages; it provides flexibility in choosing data rate, deviation, channel frequency, and channel spacing ...

Page 32

Si4030/31/32-B1 5.2.1. Output Power Selection With the Si4032, the output power is configurable steps with the txpow[2:0] field in "Register 6Dh. TX Power." Extra output power can allow the use of a cheaper, smaller antenna reducing the ...

Page 33

Crystal Oscillator The Si4030/31/32 includes an integrated 30 MHz crystal oscillator with a fast start-up time of less than 600 µs when a suitable parallel resonant crystal is used. The design is differential with the required crystal load capacitance ...

Page 34

Si4030/31/32-B1 6. Data Handling and Packet Handler The internal modem is designed to operate with a packet including a 10101... preamble structure. To configure the modem to operate with packet formats without a preamble or other legacy packet structures contact ...

Page 35

Add R/W Function/D D7 escription 08 R/W Operating & Reserved Reserved Reserved Reserved Function Control 2 7C R/W TX FIFO Reserved Reserved txafthr[5] Control 1 7D R/W TX FIFO Reserved Reserved txaethr[5] txaethr[4] txaethr[3] txaethr[2] txaethr[1] txaethr[0] Control 2 The ...

Page 36

Si4030/31/32-B1 D ata 1 D ata 2 D ata 3 D ata 4 D ata 5 D ata 6 D ata 7 D ata 8 D ata 9 Figure 13. Multiple Packets in TX Packet Handler Add R/W Function/Description D7 ...

Page 37

Data Whitening, Manchester Encoding, and CRC Data whitening can be used to avoid extended sequences the transmitted data stream to achieve a more uniform spectrum. When enabled, the payload data bits are XORed with ...

Page 38

Si4030/31/32-B1 6.6. TX Retransmission and Auto TX The Si4030/31/32 is capable of automatically retransmitting the last packet loaded in the TX FIFO. Automatic retransmission is set by entering the TX state with the txon bit without reloading the TX FIFO. ...

Page 39

Auxiliary Functions 7.1. Smart Reset The Si4030/31/32 contains an enhanced integrated SMART RESET or POR circuit. The POR circuit contains both a classic level threshold reset as well as a slope detector POR. This reset circuit was designed to ...

Page 40

Si4030/31/32-B1 7.2. Microcontroller Clock The 30 MHz crystal oscillator frequency is divided down internally and may be output to the microcontroller through GPIO2. This feature is useful to lower BOM cost by using only one crystal in the system. The ...

Page 41

General Purpose ADC An 8-bit SAR ADC is integrated for general purpose use, as well as for digitizing the on-chip temperature sensor reading. Registers 0Fh "ADC Configuration", 10h "Sensor Offset" and 4Fh "Amplifier Offset" can be used to configure ...

Page 42

Si4030/31/32-B1 7.4. Temperature Sensor An integrated on-chip analog temperature sensor is available. The temperature sensor will be automatically enabled when the temperature sensor is selected as the input of the ADC or when the analog temp voltage is selected on ...

Page 43

Temperature Measurement with ADC8 300 250 200 150 100 50 0 -40 - Temperature [Celsius] Figure 18. Temperature Ranges using ADC8 Si4030/31/32-B1 Sensor Range 0 Sensor Range 1 Sensor Range 2 Sensor Range 100 ...

Page 44

Si4030/31/32-B1 7.5. Low Battery Detector A low battery detector (LBD) with digital read-out is integrated into the chip. A digital threshold may be programmed into the lbdt[4:0] field in "Register 1Ah. Low Battery Detector Threshold." When the digitized battery voltage ...

Page 45

Wake-Up Timer The chip contains an integrated wake-up timer which can be used to periodically wake the chip from SLEEP mode. The wake-up timer runs from the internal 32.768 kHz RC Oscillator. The wake-up timer can be configured to ...

Page 46

Si4030/31/32-B1 WUT Period GPIOX =00001 nIRQ SPI Interrupt Read Chip State Sleep Ready 1.5 mA Current Consumption WUT Period GPIOX =00001 nIRQ SPI Interrupt Read Chip State Current Consumption Figure 19. WUT Interrupt and WUT Operation 46 Interrupt Enable enwut ...

Page 47

GPIO Configuration Three general purpose IOs (GPIOs) are available. Numerous functions such as specific interrupts, TRSW control, Microcontroller Output, etc. can be routed to the GPIO pins as shown in the tables below. When in Shutdown mode all the ...

Page 48

Si4030/31/32-B1 8. Reference Design Reference designs are available at schematics, BOM, and layout. TX matching component values for the different frequency bands can be found in the application notes “AN435: Si4032/4432 PA Matching” and “AN436: Si4030/4031/4430/4431 PA Matching.” 48 www.silabs.com ...

Page 49

Application Notes and Reference Designs A comprehensive set of application notes and reference designs are available to assist with the development of a radio system. A partial list of applications notes is given below. For the complete list of ...

Page 50

Si4030/31/32-B1 11. Register Table and Descriptions Add R/W Function/Desc 01 R Device Version 02 R Device Status 03 R Interrupt Status Interrupt Status 2 05 R/W Interrupt Enable 1 06 R/W Interrupt Enable 2 07 R/W Operating ...

Page 51

Pin Descriptions: Si4030/31/32 Pin Pin Name I/O 1 VDD_RF VDD +1.8 to +3.6 V supply voltage input to all analog +1.7 V regulators. The recommended Transmit output pin. The PA output is ...

Page 52

... Si4030/31/32-B1 13. Ordering Information Part Number* Si4030-B1-FM ISM EZRadioPRO Transmitter Si4031-B1-FM ISM EZRadioPRO Transmitter Si4032-B1-FM ISM EZRadioPRO Transmitter *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. 52 Description Rev 1.1 Package Operating ...

Page 53

... X = Part Number Line 1 Marking Die Revision Line 2 Marking: TTTTT = Internal Code YY= Year Line 3 Marking Workweek Si4030/31/32- Si4030 1 = Si4031 2 = Si4032 B = Revision B1 Internal tracking code. Assigned by the Assembly House. Corresponds to the last significant digit of the year and workweek of the mold date. Rev 1.1 53 ...

Page 54

Si4030/31/32-B1 15. Package Outline: Si4030/31/32 Figure 21 illustrates the package details for the Si4030/31/32. Table 16 lists the values for the dimensions shown in the illustration. Figure 21. 20-Pin Quad Flat No-Lead (QFN) Symbol ...

Page 55

PCB Land Pattern: Si4030/31/32 Figure 22 illustrates the PCB land pattern details for the Si4030/31/32. Table 17 lists the values for the dimensions shown in the illustration. Figure 22. PCB Land Pattern Rev 1.1 Si4030/31/32-B1 55 ...

Page 56

Si4030/31/32-B1 Table 17. PCB Land Pattern Dimensions Symbol Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. This land pattern design is based on IPC-7351 guidelines. Note: Solder ...

Page 57

OCUMENT HANGE IST Revision 1.0 to Revision 1.1 Corrected typo under Features/Low Power Consumption on page 1.  Si4030/31/32-B1 Rev 1.1 57 ...

Page 58

... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...

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