AD6654/PCB Analog Devices Inc, AD6654/PCB Datasheet - Page 60

• Manufacturer Part Number: AD6654/PCB
• Description: BOARD EVALUATION FOR AD6654
• Manufacturer: Analog Devices Inc

Specifications of AD6654/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6554
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD6654
SERIAL PORT CONTROL
The AD6654 serial port allows all memory to be accessed
(programmed or readback) serially in one-byte words. Either
serial port or microport can be used (but not both) at any given
time. Serial port control is selected using the SMODE pin (0 =
microport, 1 = serial port). Two serial port modes are available.
An SPI-compatible port is provided as well as a SPORT. The
choice of SPI or SPORT mode is selected using the MODE pin
(0 = SPI, 1 = SPORT).
Each individual byte of serial data (address, instruction and
data) may be shifted in either MSB first or LSB first using the
MSBFIRST pin (1 = MSB first, 0 = LSB first). The serial chip
select ( SCS ) pin is brought low to access the device for serial
control. When the SCS pin is held high, serial programming is
inhibited.
HARDWARE INTERFACE
The pins described in Table 26 comprise the physical interface
between the user’s programming device and the serial port of
the AD6654. All serial pins are inputs except for SDO, which is
an open-drain output and should be pulled high by an external
pull-up resistor (suggested value 1 kΩ).
A complete read or write cycle requires a minimum of three
bytes to transfer, consisting of address word, instruction word,
and data-word(s). As many as 127 data-words can be
transferred during a block transfer cycle. All address,
instruction, and data-word(s) must be formatted LSB first or
MSB first to match the state of the MSBFIRST pin.
Table 26. Serial Port Pins
Pin
SCLK
MSBFIRST
STFS
SRFS
SDI
SDO
SCS
SMODE
MODE
Function
Serial Clock in Both SPI and SPORT Modes. Should have a rise/fall time of 3 ns max.
Indicates whether the first bit shifted in or out of the serial port is the MSB (1) or LSB (0) for both instruction and data-
words. Also indicates if the first instruction word (address) is a block start or a block end for multiple byte transfers. This
pin also controls the functionality when programming indirectly addressed registers.
Serial Transmit Frame Sync in SPORT Mode. STFS is not used in SPI mode.
Serial Receive Frame Sync in SPORT Mode. SRFS is not used in SPI mode.
Serial Data Input in Both Modes. Serial data is clocked in on the rising edge of SCLK.
Serial Data Output in Both Modes. Serial data is clocked out on the rising edge of SCLK.
Active-Low Serial Chip Select in Both Modes.
Serial Mode. Part is programmed through the serial port when this pin is high.
Mode Pin. Selects between SPI (0) and SPORT (1) modes.
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The first word for serial transfer is the internal register address.
In LSB first mode, the address is the lower-most address for the
block transfer (subsequent addresses are generated by internal
increment). In MSB first, the address is highest address for the
block transfer (subsequent addresses are generated by internal
decrement).
The second word of serial transfer contains a one-bit read/write
indicator (1 = read, 0 = write), and seven bits to define the
number of data bytes to be transferred (N). For a single data
byte transfer (N = 1); one byte is shifted into SDI for a write
transfer, or shifted out of SDO for a read transfer, and the cycle
is complete. For a block transfer, N write/read operations are
performed, and the internal register address increments
(MSBFIRST = 0) or decrements (MSBFIRST = 1) after each
data byte is clocked into SDI for a write operation, or after each
data byte is clocked out of SDO for a read operation.
Figure 61 to Figure 64 illustrate a three byte block transfer
through the serial port. Read and write operations with
MSBFIRST high and low are shown. Please note that the figures
show the sequence for write/read transfer, and actual data
should be shifted in or out based upon the status of the
MSBFIRST pin. The operation details are common to both SPI
and SPORT modes except for the use of framing signals and
timing. Individual mode details follow. In single byte transfer
mode, the count in the second byte would be reduced to one,
and the number of data bytes would be reduced to one.