AD6654/PCB Analog Devices Inc, AD6654/PCB Datasheet - Page 42

• Manufacturer Part Number: AD6654/PCB
• Description: BOARD EVALUATION FOR AD6654
• Manufacturer: Analog Devices Inc

Specifications of AD6654/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6554
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD6654
MONO-RATE RAM COEFFICIENT FILTER (MRCF)
The MRCF is a programmable sum-of-products FIR filter. This
filter block comes after the first data router and before the
DRCF and CRCF programmable filters. It consists of a maxi-
mum of eight taps with 6-bit programmable coefficients. Note
that this block does not decimate and is used as a helper filter
for the DRCF and CRCF filters that follow in the signal chain.
The number of filter taps that are to be calculated is program-
mable using the 3-bit number-of-taps word in the MRCF
control register of the channel under consideration. The 3-bit
word programmed is one less than the number of filter taps.
The coefficients themselves are programmed in eight MRCF
coefficient memory registers for individual channels. The input
and output data to the block are both 20-bit.
SYMMETRY
Though the MRCF filter does not require symmetrical filters, if
the filter is symmetrical, then the symmetry bit in the MRCF
control register should be set. When this bit is set, only half of
the impulse response needs to be programmed into the MRCF
coefficient memory registers. For example, if the number of
filter taps is equal to five or six and the filter is symmetrical,
then only three coefficients need to be written into the coeffi-
cient memory. For both symmetrical and asymmetrical filters,
the number of filter taps is limited to eight.
CLOCK RATE
The MRCF filter runs on an internal high speed PLL clock. This
clock rate can be as high as 200 MHz. If the half clock rate bit in
the MRCF control register is set, then only half the PLL clock
rate is used (maximum of 100 MHz). This results in power
savings, but can only be used if certain conditions are met.
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Because this filter is nondecimating, the input and output rates
are both the same and equal to one of the following:
If f
then half of the PLL clock can be used for processing (power
savings). Otherwise, the PLL clock should be used.
BYPASS
The MRCF filter can be used in normal operation or bypassed
using the MRCF bypass bit in the MRCF control register. When
the filter is bypassed, the output of the filter is the same as the
input of the filter. Bypassing the MRCF filter when not required
results in power savings.
SCALING
The output of the MRCF filter can be scaled by using the 2-bit
MRCF scaling word in the MRCF control register. Table 20
shows the valid values for the 2-bit word and their
corresponding settings.
Table 20. MRCF Scaling Factor Settings
MRCF Scale Word[1:0]
00
01
10
11
PLLCLK
f
f
f
MRCF
MRCF
MRCF
is the PLL clock and if
= f
=
× N
HB2
f
TAPS
HB2
2
, if HB2 is not bypassed
<=
, if HB2 is not bypassed
f
PLLCLK
2
,
Scaling Factor
18.06 dB attenuation
12.04 dB attenuation
6.02 dB attenuation
No scaling, 0 dB