AD6654/PCB Analog Devices Inc, AD6654/PCB Datasheet - Page 58

• Manufacturer Part Number: AD6654/PCB
• Description: BOARD EVALUATION FOR AD6654
• Manufacturer: Analog Devices Inc

Specifications of AD6654/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6554
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD6654
CHIP SYNCHRONIZATION
The AD6654 offers two types of synchronization: start sync and
hop sync. Start sync is used to bring individual channels out of
sleep after programming. It can also be used while AD6654 is
operational to resynchronize the internal clocks. Hop sync is
used to change or update the NCO frequency tuning word and
the NCO phase offset word.
Two methods can be used to initiate a start sync or hop sync:
•
•
The pin synchronization configuration register (Address 0x04)
is used to make pin synchronization even more flexible. The
part can be programmed to be edge-sensitive or level-sensitive
for SYNC pins. In edge-sensitive mode, a rising edge on the
SYNC pins is recognized as a synchronization event.
START
Start refers to the startup of an individual channel or chip, or of
multiple chips. If a channel is not used, it should be put into
sleep mode to reduce power dissipation. Following a hard reset
(low pulse on the RESET pin), all channels are placed into sleep
mode. Alternatively, channels can be manually put to sleep by
writing 0 to the sleep register.
Start with Soft Sync
The AD6654 can synchronize channels or chips under micro-
processor control. The start hold-off counter, in conjunction
with the soft start enable bit and the channel enable bits, enables
this synchronization.
To synchronize the start of multiple channels via micro-
processor control:
1.
2.
3.
Note: When using SPI or SPORT for programming these
registers, the last step in the above procedure needs to be
Soft sync is provided by the memory map registers and is
applied to channels directly through the microport or serial
port interface.
Pin sync is provided using four hard-wired SYNC[3:0] pins.
Each channel is programmed to listen to one of these SYNC
pins and do a start sync or a hop sync when a signal is
received on these pins.
Write the channel enable register to enable one or more
channels, if the channels are inactive.
Write the NCO start hold-off counter registers with the
appropriate value (greater than 0 and less than 2
Write the soft sync channel enable bit(s) and soft start
synchronization enable bit high in the soft synchroniza-
tion configuration register. This starts the countdown by
the start hold-off counter. When the count reaches 1, the
channels are activated or resynchronized.
16
).
Rev. 0 | Page 58 of 88
repeated, that is, the soft synchronization register needs to be
written twice.
Start with Pin Sync
Four sync pins (SYNC0, SYNC1, SYNC2, and SYNC3) provide
very accurate synchronization among channels. Each channel
can be programmed to monitor any of the four sync pins.
To start the channels with a pin sync:
1.
2.
3.
4.
HOP
Hop is a jump from one NCO frequency and/or phase offset to
a new NCO frequency and/or phase offset. This change in
frequency and/or phase offset can be synchronized via micro-
processor control (soft sync) or via an external sync signal
(pin sync).
Hop with Soft Sync
The AD6654 can synchronize a change in NCO frequency
and/or phase offset of multiple channels or chips under
microprocessor control. The NCO hop hold-off counter, in
conjunction with the soft hop enable bit and the channel enable
bits, enables this synchronization.
To synchronize the hop of multiple channels via microprocessor
control:
1.
2.
3.
4.
Write the channel register to enable one more channels, if
the channels are inactive.
Write the NCO start hold-off counter registers with the
appropriate value (greater than 0 and less than 2
Program the channel NCO control registers to monitor
the appropriate SYNC pins.
Write the start synchronization enable bit and SYNC pin
enable bits high in the pin synchronization configuration
register. This starts the countdown of the start hold-off
counter. When the count reaches 1, the channels are
activated or resynchronized.
Write the NCO frequency register(s) or phase offset
register(s) to the new value.
Write the NCO frequency hold-off counter registers with
the appropriate value (greater than 0 and less than 2
Write 0x00 to the soft synchronization configuration
register.
Write the soft hop synchronization enable bit and the
corresponding soft sync channel enable bits high in the
soft synchronization configuration register. This starts the
countdown by the frequency hold-off counter. When the
16
).
16
).