AD6654/PCB Analog Devices Inc, AD6654/PCB Datasheet - Page 19

• Manufacturer Part Number: AD6654/PCB
• Description: BOARD EVALUATION FOR AD6654
• Manufacturer: Analog Devices Inc

Specifications of AD6654/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD6554
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 11. Pin Function Descriptions
Name
POWER SUPPLY
AVDD
DRVDD
VDDCORE
VDDIO
DGND
AGND
ADC INPUTS
AIN+
AIN−
ENC+
ENC−
ADC OUTPUTS
DR
OVR
V
C1
C2
REF
DNC = DO NOT CONNECT
A
B
C
D
G
H
K
M
N
R
E
F
J
L
P
T
CHIPID0
CHIPID1
SMODE
FILTER
PCCH2
DGND
DGND
DGND
DGND
EXT _
PC14
PCIQ
PC1
D7
D3
A5
A3
1
1
Type
Power
Power
Power
Power
Ground
Ground
Input
Input
Input
Input
Output
Output
Output
Output
Output
CHIPID3
PCGAIN
PCREQ
MODE
FIRST
MSB _
PC12
PC13
PA11
PC4
D14
D13
D11
IRP
D8
D6
A4
2
2
CHIPID2
A0 (SDI)
DTACK
VDDIO
(RDY,
(SCS)
SDO)
PC11
PA13
PA14
PC9
PA6
PA4
D12
D15
CS
D9
D4
D0
3
3
Pin Number
See
See
See
See
See
See
M16
L16
T16
R16
T12
A12
T14
H16
F16
CPUCLK
(SCLK)
RESET
SRFS)
STFS)
CORE
PCLK
(WR,
PC15
PA10
(RD,
VDD
R/W
PC6
D10
PC7
PA8
PA2
DS
Table 12
Table 12
Table 12
Table 12
Table 12
Table 12
D2
A7
A2
4
4
PCACK
PCCH0
PACH1
PC10
PB10
PC3
PC5
PC0
PC2
PC8
PB5
PA0
D1
D5
A6
A1
5
5
PAREQ
PCCH1
VDDIO
VDDIO
CORE
CORE
DGND
DGND
DGND
DGND
PB13
PB12
VDD
VDD
PA5
PA3
PA1
PB7
Function
5 V Analog ADC Core Supply.
3.3 V ADC Output Driver Supply.
1.8 V Digital DDC Core Supply.
3.3 V Digital DDC I/O Supply.
Digital Core and I/O Ground.
Analog ADC Ground.
Differential Analog Input.
Differential Analog Input.
Differential Encode Input. Conversion initiated on rising edge.
Differential Encode Input.
Data Ready. Inverted and delayed representation of ENC+ used for driving the DDC CLK
input.
Overange Bit. A logic high indicates analog input exceeds ±FS.
2.4 V Fixed Internal Voltage Reference. Bypass to AGND with 0.1 µF chip capacitor.
Compensation Pin for ADC Voltage Reference. Bypass to AGND with 0.1 µF chip capacitor.
Compensation Pin for ADC Voltage Reference. Bypass to AGND with 0.1 µF chip capacitor.
6
6
Figure 18. 256 BGA Configuration (Top View)
VDDIO
VDDIO
CORE
CORE
DGND
DGND
DGND
DGND
PA12
PA15
PB11
PBIQ
VDD
VDD
PA9
PA7
PB1
PB8
7
7
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PAACK
PBREQ
PACH2
PACH0
VDDIO
VDDIO
PBCH1
PBCH2
DGND
DGND
DGND
DGND
DGND
CORE
CORE
PAIQ
VDD
VDD
8
8
PAGAIN
PBACK
VDDIO
VDDIO
DGND
DGND
DGND
DGND
CORE
CORE
DGND
PB14
VDD
VDD
DNC
PB2
PB3
PB0
9
9
PBGAIN
PBCH0
SYNC0
VDDIO
VDDIO
DGND
DGND
DGND
DGND
CORE
CORE
DGND
PB15
VDD
VDD
PB6
PB4
PB9
10
10
EXPC0
SYNC3
EXPC2
EXPC1
VDDIO
VDDIO
SYNC2
SYNC1
DGND
DGND
DGND
DGND
CORE
CORE
DGND
CLK
VDD
VDD
11
11
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
DRVDD
AVDD
OVR
DNC
12
DR
12
AGND
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AGND
13
13
AGND
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
V REF
14
14
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
15
15
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
ENC
ENC+
AIN
AIN+
16
C2
C1
16
–
–
G
M
N
A
B
C
D
E
F
H
J
K
L
P
R
T
AD6654