M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 72

• Manufacturer Part Number: M306N5FCTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N5FCTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Figure 8.4 CM2 Register
NOTES:
Oscillation Stop Detection Register
b7
1. Rewrite this register after setting the PRC0 bit in the PRCR register to 1 (write enabled).
2. Bits CM20, CM21, and CM27 remain unchanged at oscillation stop detection reset.
3. Set the CM20 bit to 0 (disabled) before entering stop mode. Exit stop mode before setting the CM20 bit
4. Set the CM20 bit to 0 (disabled) before setting the CM05 bit in the CM0 register to 1 (main clock stops).
5. When the CM20 bit is set to 1 (oscillation stop, re-oscillation detection function enabled), the CM27 bit is
6. If the CM20 bit is set to 1 and the CM23 bit is set to 1 (main clock stops), do not set the CM21 bit to 0.
7. This bit is valid when the CM07 bit in the CM0 register is set to 0.
8. Where the CM20 bit is set to 1 (oscillation stop, re-oscillation detection function enabled), the CM27 bit is
9. This bit is set to 1 when the main clock is detected and the main clock re-oscillation is detected. When this
10. Determine the main clock status by reading the CM23 bit several times in an oscillation stop or re-oscillation
11. When the CM21 bit is set to 0 (on-chip oscillator stops) and the CM05 bit is set to 1 (main clock stops),
Apr 14, 2006
b6
back to 1 (enabled).
set to 1 (oscillation stop, re-oscillation detection interrupt), and the CPU clock source is the main clock,
the CM21 bit is set to 1 (on-chip oscillator clock) if the main clock stop is detected.
set to 1 (oscillation stop, re-oscillation detection interrupt), and the CM11 bit is set to 1 (PLL clock is selected
as the CPU clock source), the CM21 bit remains unchanged even if a main clock stop is detected. When the
CM22 bit is set to 0 under these conditions, an oscillation stop, re-oscillation detection interrupt request is
generated at main clock stop detection. Set the CM21 bit to 1 (on-chip oscillator clock) in the interrupt routine.
bit changes state from 0 to 1, an oscillation stop and re-oscillation detection interrupt request is generated.
Use this bit in an interrupt routine to discriminate the interrupt sources between the oscillation stop and
re-oscillation detection interrupt and the watchdog timer interrupt. This bit is set to 0 by writing 0 in a
program. (This bit remains unchanged even if writing 1. Nor is it set to 0 when an oscillation stop and
re-oscillation detection interrupt request is acknowledged.)
If an oscillation stop or a re-oscillation is detected when the CM22 bit = 1, no oscillation stop and re-oscillation
detection interrupt requests are generated.
detection interrupt routine.
the CM06 bit is fixed to 1 (divide-by-8 mode) and the CM15 bit is fixed to 1 (drive capability high).
b5
0 0
b4
b3
b2
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b1
b0
Bit Symbol
CM20
CM21
CM22
CM23
CM27
(b5-b4)
Symbol
(b6)
CM2
-
-
Oscillation stop,
re-oscillation detection
enable bit
System clock select
bit 2
Oscillation stop,
re-oscillation detection
flag
XIN monitor flag
Reserved bits
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
Operation select bit
(when an oscillation stop,
re-oscillation is detected)
(1)
(9)
(2) (5) (6) (7) (8) (11)
Bit Name
Address
(2) (3) (4)
000Ch
(10)
(2)
0 : Oscillation stop, re-oscillation
1 : Oscillation stop, re-oscillation
0 : Main clock or PLL clock
1 : On-chip oscillator clock
0 : Main clock stop, re-oscillation
1 : Main clock stop, re-oscillation
0 : Main clock oscillates
1 : Main clock stops
Set to 0
0 : Oscillation stop detection reset
1 : Oscillation stop, re-oscillation
0X000000b
After Reset
detection function disabled
detection function enabled
(On-chip oscillator oscillates)
not detected
detected
detection interrupt
Function
(2)
8. Clock Generation Circuit
RW
RW
RW
RW
RW
RW
RO
-