M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 63
![IC M16C MCU FLASH 100QFP](/photos/12/21/122166/qfp100-g1_pkg_sml.jpg)
M306N5FCTFP
Manufacturer Part Number
M306N5FCTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M306N5FCTFPUK.pdf
(90 pages)
3.M306N5FCTFPU0.pdf
(408 pages)
Specifications of M306N5FCTFP
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Table 7.6 Pin Functions for Each Processor Mode
I/O ports: Function as I/O ports or peripheral function I/O pins.
NOTES:
Bits PM05 to PM04
Data bus width
BYTE pin
P0_0 to P0_7
P1_0 to P1_7
P2_0
P2_1 to P2_7
P3_0
P3_1 to P3_3
P3_4
to P3_7
P4_0
to P4_3
P4_4
P4_5
P4_6
P4_7
P5_0
P5_1
P5_2
P5_3
P5_4
P5_5
P5_6
P5_7
Processor Mode
1. For setting bits PM01 to PM00 to 01b (memory expansion mode) and bits PM05 to PM04 to 11b
2. In separate bus mode, these pins serve as the address bus.
3.
4. When accessing the area that uses a multiplexed bus, these pins output an undefined value during
(multiplexed bus assigned to the entire CS space), apply “H” to the BYTE pin (external data bus is an
8-bit width). While the CNVSS pin is held “H” (VCC), do not rewrite bits PM05 to PM04 to 11b after
reset. If bits PM05 to PM04 are set to 11b during memory expansion mode, P3_1 to P3_7 and P4_0 to
P4_3 become I/O ports, in which case the accessible area for each CS is 256 bytes.
If the data bus is 8-bit width, make sure the PM02 bit is set to 0 (RD, BHE, WR).
a write.
Apr 14, 2006
PM11 = 0 A12 to A15
PM11 = 1 I/O ports
PM06 = 0 A16 to A19
PM06 = 1 I/O ports
CS0 = 0
CS0 = 1
CS1 = 0
CS1 = 1
CS2 = 0
CS2 = 1
CS3 = 0
CS3 = 1
PM02 = 0
PM02 = 1 -
PM02 = 0
PM02 = 1 -
page 41 of 372
D0 to D7
I/O ports
A0
A1 to A7
A8
A9 to A11
I/O ports
_______
CS0
I/O ports
_______
CS1
I/O ports
_______
CS2
I/O ports
_______
CS3
_______
WR
________
BHE
_____
RD
BCLK
__________
HLDA
__________
HOLD
ALE
________
RDY
(3)
(3)
Memory Expansion Mode or Microprocessor Mode
8 bits
00b (separate bus)
“H”
D8 to D15
________
WRL
_________
WRH
16 bits
_____
“L”
01b (CS2 is for multiplexed bus and
10b (CS1 is for multiplexed bus and
D0 to D7
I/O ports
A0/D0
A1 to A7
/D1 to D7
-
-
(3)
(3)
others are for separate bus)
_______
_______
8 bits
others are for separate bus)
“H”
(2)
(4)
(2)
_____
D8 to D15
A0
A1 to A7
/D0 to D6
A8/D7
________
WRL
_________
WRH
_____
________ ______
16 bits
“L”
(2)
(4)
(2)
Memory Expansion Mode
(multiplexed bus for
I/O ports
I/O ports
A0/D0
A1 to A7/D1 to D7
A8
I/O ports
I/O ports
I/O ports
-
-
the entire space)
(3)
(3)
8 bits
11b
“H”
7. Bus
(1)
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