M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 399

IC M16C MCU FLASH 100QFP

M306N5FCTFP

Manufacturer Part Number
M306N5FCTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N5FCTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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2.00 Nov. 10, 2004
Rev.
Date
REVISION HISTORY
Page
219
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276
Figure 19.13 Transition Between Operational Modes is revised.
19.5.1 CAN Reset/Initialization Mode is revised.
19.5.2 CAN Operation Mode is revised.
19.5.3 CAN Sleep Mode is revised.
19.5.4 CAN Interface Sleep Mode is added.
19.5.5 Bus Off State is revised.
19.12 Return from Bus Off Function is revised.
19.14 Listen-Only Mode
Figure 19.21 Timing of Receive Data Frame Sequence: Waveform of RecState bit is revised.
19.15.1 Reception: (4) (5) are revised.
Figure 19.22 Timing of Transmit Sequence
19.15.2 Transmission: (1) to (4) are revised.
21.2.1 ROM Code Protect Function is revised.
21.2.2 ID Code Check Function is revised.
Figure 21.2 ROMCP Register is revised.
Figure 21.4 (upper) FMR0 Register: The value of After Reset is revised.
21.3.3.1 FMR00 Bit is revised.
21.3.3.8 FMR11 Bit is revised.
21.3.3.9 FMR16 Bit is revised.
Figure 21.5 Setting and Resetting of EW0 Mode is revised.
Figure 21.6 Setting and Resetting of EW1 Mode: NOTE 3 is revised.
Figure 21.7 Processing Before and After Low Power Dissipation Mode: NOTE 4 is added.
21.3.4.12 Low Power Dissipation Mode and On-chip Oscillator Low Power Dissipation
Mode is revised.
Table 21.4 Software Commands: NOTE 2 is deleted.
21.3.5.4 Program Command (40h)
Figure 21.11 Read Lock Bit Status Command
21.3.7.1 Sequencer Status (SR7 and FMR00 Bits) is revised.
Table 21.7 Pin Functions for Standard Serial I/O Mode
Figure 21.14 Pin Connections for Standard Serial I/O Mode (2) is added.
Figure 21.16 Circuit Application in Standard Serial I/O Mode 2: "RESET" is added.
Table 21.8 Pin Functions for CAN I/O Mode
Figure 21.18 Pin Connections for CAN I/O Mode (2) is added.
Table 21.9 Flash Memory Version Electrical Characteristics
• last line: "When listen-only mode is selected, do not request the transmission." is added.
• The position of the number corresponding to the text is revised.
• From bottom to 3rd line: "read command" is revised to "read array command".
• "Locked", "Not locked" are revised to "Block is locked", "Block is not locked".
• "VCC" is revised to "VCC1", and "VCC2" is added.
• VCC1, VCC2, VSS: VCC apply condition is added.
• "VCC" is revised to "VCC1", and "VCC2" is added.
• VCC1, VCC2, VSS: VCC apply condition is added.
• Parameter is added and the value of some item is revised.
M16C/6N Group (M16C/6N5) Hardware Manual
C-5
Description
Summary
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