MC68HC711D3CFNE2 Freescale Semiconductor, MC68HC711D3CFNE2 Datasheet - Page 83

• Manufacturer Part Number: MC68HC711D3CFNE2
• Description: IC MCU 8BIT 3MHZ 44-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711D3CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 26
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Bits 3–0 — Not implemented
7.7.3 SPI Data I/O Register
The SPI data I/O register (SPDR) is used when transmitting or receiving data on the serial bus. Only a
write to this register initiates transmission or reception of a byte, and this only occurs in the master device.
At the completion of transferring a byte of data, the SPIF status bit is set in both the master and slave
devices.
A read of the SPDR is actually a read of a buffer. To prevent an overrun and the loss of the byte that
caused the overrun, the first SPIF must be cleared by the time a second transfer of data from the shift
register to the read buffer is initiated.
Freescale Semiconductor
Always reads 0
Address:
Reset:
Read:
Write:
$002A
Bit 7
Bit 7
SPI is double buffered in and single buffered out.
Figure 7-5. SPI Data I/O Register (SPDR)
Bit 6
6
MC68HC711D3 Data Sheet, Rev. 2.1
Bit 5
5
NOTE
Unaffected by reset
Bit 4
4
Bit 3
3
Bit 2
2
Bit 1
1
Bit 0
Bit 0
SPI Registers
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