MC68HC711D3CFNE2 Freescale Semiconductor, MC68HC711D3CFNE2 Datasheet - Page 25

• Manufacturer Part Number: MC68HC711D3CFNE2
• Description: IC MCU 8BIT 3MHZ 44-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711D3CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 26
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Freescale Semiconductor
$000C
$000D
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
Addr.
Output Compare 1 Mask Register
Output Compare 1 Data Register
Timer Compare Force Register
Register Name
Port C Control Register
Data Direction Register
Data Direction Register
Data Direction Register
Port C Data Register
Port D Data Register
Port A Data Register
Port B Data Register
for Port C (DDRC)
for Port D (DDRD)
for Port B (DDRB)
Figure 2-2. Register and Control Bit Assignments (Sheet 1 of 5)
See page 61.
See page 63.
See page 63.
See page 62.
See page 62.
See page 63.
See page 64.
See page 64.
See page 93.
See page 93.
See page 94.
Reserved
Reserved
Reserved
(CFORC)
(PORTC)
(PORTD)
(PORTA)
(PORTB)
(OC1M)
(OC1D)
(PIOC)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC711D3 Data Sheet, Rev. 2.1
OC1M7
OC1D7
DDC7
DDD7
DDB7
FOC1
Bit 7
PA7
PC7
PB7
PD7
Hi-Z
R
R
R
0
0
0
0
0
0
0
0
0
= Unimplemented
OC1M6
OC1D6
DDC6
DDD6
FOC2
DDB6
PA6
PC6
PB6
PD6
R
R
R
6
0
0
0
0
0
0
0
0
0
0
OC1M5
OC1D5
CWOM
DDB5
DDC5
DDD5
FOC3
PA5
PC5
PB5
PD5
R
R
R
5
0
0
0
0
0
0
0
0
0
Reset configures pins as Hi-Z inputs
Reset configures pins as Hi-Z inputs
OC1M4
OC1D4
DDB4
DDC4
DDD4
FOC4
PA4
PC4
PB4
PD4
R
R
R
R
4
0
0
0
0
0
0
0
0
0
0
= Reserved
OC1M3
OC1D3
DDB3
DDC3
DDD3
FOC5
PA3
Hi-Z
PC3
PB3
PD3
R
R
R
3
0
0
0
0
0
0
0
0
0
DDB2
DDC2
DDD2
PA2
Hi-Z
PC2
BP2
PD2
R
R
R
2
0
0
0
0
0
0
0
0
0
0
0
0
U = Unaffected
DDB1
DDC1
DDD1
PA1
Hi-Z
PC1
BP1
PD1
R
R
R
1
0
0
0
0
0
0
0
0
0
0
0
0
Memory Map
DDB0
DDC0
DDD0
Bit 0
PC0
PD0
PA0
Hi-Z
PB0
R
R
R
0
0
0
0
0
0
0
0
0
0
0
0
25