SAK-C167CS-L40M CA+ Infineon Technologies, SAK-C167CS-L40M CA+ Datasheet - Page 63

IC MCU 16BIT 40MHZ MQFP-144

SAK-C167CS-L40M CA+

Manufacturer Part Number
SAK-C167CS-L40M CA+
Description
IC MCU 16BIT 40MHZ MQFP-144
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAK-C167CS-L40M CA+

Core Processor
C166
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
11K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144- BSQFP
Data Bus Width
16 bit
Data Ram Size
11 KB
Interface Type
1xUSART, 1xSSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Packages
PG-MQFP-144
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
11.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
K167CSL40MCAZNP
K167CSL40MCAZXP
SAK-C167CS-L40M CA+
SAK-C167CS-L40MCAIN
SAKC167CSL40MCAXT
SP000103490
AC Characteristics
External Clock Drive XTAL1
(Operating Conditions apply)
Table 12
Parameter
Oscillator period
High time
Low time
Rise time
Fall time
1)
2)
3)
Figure 13
Note: If the on-chip oscillator is used together with a crystal, the oscillator frequency is
Data Sheet
The minimum and maximum oscillator periods for PLL operation depend on the selected CPU clock generation
mode. Please see respective table above.
The clock input signal must reach the defined levels
The minimum high and low time refers to a duty cycle of 50%. The maximum operating frequency (
direct drive mode depends on the duty cycle of the clock input signal.
limited to a range of 4 MHz to 40 MHz.
It is strongly recommended to measure the oscillation allowance (or margin) in the
final target system (layout) to determine the optimum parameters for the oscillator
operation. Please refer to the limits specified by the crystal supplier.
When driven by an external clock signal it will accept the specified frequency
range. Operation at lower input frequencies is possible but is guaranteed by
design only (not 100% tested).
2)
2)
2)
2)
0.5
External Clock Drive Characteristics
External Clock Drive XTAL1
V
DD
Symbol
t
t
t
t
t
OSC
1
2
3
4
SR 25
SR 12
SR 12
SR –
SR –
t
1
min.
Direct Drive
3)
3)
1:1
max.
8
8
59
t
V
2
IL2
min.
20
5
5
and
Prescaler
V
t
t
OSC
IH2
3
2:1
.
max.
5
5
min.
37
10
10
1)
t
4
MCT02534
PLL
1:N
V
V
IH2
IL
max.
500
10
10
C167CS-4R
V2.2, 2001-08
C167CS-L
1)
Unit
ns
ns
ns
ns
ns
f
CPU
) in

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